ICS9LPRS464 Datasheet, PDF (2/23 Pages) Integrated Device Technology – System Clock Chip for ATI RS/RD600 series chipsets using AMD CPUs

ICS9LPRS464
System Clock Chip for ATI RS/RD600 series chipsets using AMD CPUss
Pin Description
PIN #
PIN NAME
1 GNDREF
2 VDDREF
3 X1
4 X2
5 VDD48
6 48MHz_0
7 48MHz_1
8 GND48
9 SMBCLK
10 SMBDAT
11 RESET_IN#
12 SRC5T_LPR
13 SRC5C_LPR
14 VDDSRC
15 GNDSRC
16 SRC4T_LPR
17 SRC4C_LPR
18 SRC3T_LPR
19 SRC3C_LPR
20 SRC2T_LPR
21 SRC2C_LPR
22 GNDSRC
23 VDDSRC
24 SRC1T_LPR
25 SRC1C_LPR
26 VDDSRC
27 GNDSRC
28 *CLKREQB#
TYPE
GND
PWR
IN
OUT
PWR
OUT
OUT
GND
IN
I/O
IN
OUT
OUT
PWR
GND
OUT
OUT
OUT
OUT
OUT
OUT
GND
PWR
OUT
OUT
PWR
GND
IN
DESCRIPTION
Ground pin for the REF outputs.
Ref, XTAL power supply, nominal 3.3V
Crystal input, nominally 14.318MHz
Crystal output, nominally 14.318MHz
Power pin for the 48MHz outputs and core. 3.3V
48MHz clock output.
48MHz clock output.
Ground pin for the 48MHz outputs
Clock pin of SMBus circuitry, 5V tolerant.
Data pin for SMBus circuitry, 5V tolerant.
Real Time falling edge triggered input, When asserted, the part initiates a power
up reset with the SMBus being reset to it's power up values, and all PLL derived
clocks stopped for the duration of Power up Stabilization. REF outputs continue
to run.
True clock of low power differential SRC clock pair with integrated 33 ohm series
resistor. (no 50ohm shunt resistor to GND needed)
Complement clock of low power differential SRC clock pair with integrated 33
ohm series resistor. (no 50ohm shunt resistor to GND needed)
Supply for SRC, 3.3V nominal
Ground pin for the SRC outputs
True clock of low power differential SRC clock pair with integrated 33 ohm series
resistor. (no 50ohm shunt resistor to GND needed)
Complement clock of low power differential SRC clock pair with integrated 33
ohm series resistor. (no 50ohm shunt resistor to GND needed)
True clock of low power differential SRC clock pair with integrated 33 ohm series
resistor. (no 50ohm shunt resistor to GND needed)
Complement clock of low power differential SRC clock pair with integrated 33
ohm series resistor. (no 50ohm shunt resistor to GND needed)
True clock of low power differential SRC clock pair with integrated 33 ohm series
resistor. (no 50ohm shunt resistor to GND needed)
Complement clock of low power differential SRC clock pair with integrated 33
ohm series resistor. (no 50ohm shunt resistor to GND needed)
Ground pin for the SRC outputs
Supply for SRC, 3.3V nominal
True clock of low power differential SRC clock pair with integrated 33 ohm series
resistor. (no 50ohm shunt resistor to GND needed)
Complement clock of low power differential SRC clock pair with integrated 33
ohm series resistor. (no 50ohm shunt resistor to GND needed)
Supply for SRC, 3.3V nominal
Ground pin for the SRC outputs
Programmable Clock Request pin for SRC/ATIG/SB_SRC outputs. If output is
selected for control, then that output is controlled as follows:
0 = Enabled, 1 = Tri-state
IDT^TM/ICS^TM System Clock Chip for ATI RS/RD600 series chipsets using AMD CPUs
2
1377A—04/07/08