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9DBV0531_17 Datasheet, PDF (7/17 Pages) Integrated Device Technology – 5-Output 1.8V HCSL Fanout Buffer
9DBV0531 DATASHEET
Electrical Characteristics–DIF Low-Power HCSL Outputs
TA = TCOM or TIND; Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS NOTES
Slew rate
Slew rate matching
dV/dt
dV/dt
ΔdV/dt
Scope averaging on, fast setting
Scope averaging on, slow setting
Slew rate matching, Scope averaging on
2.3 3.4 4.3 V/ns 1,2,3
1.4 2.2 3.1 V/ns 1,2,3
5
20 % 1,2,4
Voltage High
Voltage Low
VHIGH
VLOW
Statistical measurement on single-ended signal 660 774 850
7
using oscilloscope math function. (Scope
mV
averaging on)
-150 0 150
7
Max Voltage
Min Voltage
Vmax
Vmin
Measurement on single ended signal using
813 1150 mV
7
absolute value. (Scope averaging off)
-300 -55
7
Vswing
Vswing
Scope averaging off
300 1548
mV 1,2
Crossing Voltage (abs) Vcross_abs
Scope averaging off
250 404 550 mV 1,5
Crossing Voltage (var)
Δ-Vcross
Scope averaging off
12 140 mV 1,6
1Guaranteed by design and characterization, not 100% tested in production.
2 Measured from differential waveform
3 Slew rate is measured through the Vswing voltage range centered around differential 0V. This results in a +/-150mV window around
differential 0V.
4 Matching applies to rising edge rate for Clock and falling edge rate for Clock#. It is measured using a +/-75mV window centered on
the average cross point where Clock rising meets Clock# falling. The median cross point is used to calculate the voltage thresholds the
oscilloscope is to use for the edge rate calculations.
5 Vcross is defined as voltage where Clock = Clock# measured on a component test board and only applies to the differential rising
edge (i.e. Clock rising and Clock# falling).
6 The total variation of all Vcross measurements in any particular system. Note that this is a subset of Vcross_min/max (Vcross
absolute) allowed. The intent is to limit Vcross induced modulation by setting Δ-Vcross to be smaller than Vcross absolute.
7 At default SMBus settings.
Electrical Characteristics–Current Consumption
TA = TCOM or TIND; Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
IDDR
VDDR @100MHz
Operating Supply Current
IDDDIG
VDDIG, All outputs @100MHz
IDDO
VDD1.8, All outputs @100MHz
IDDRPD
VDDR, CKPWRGD_PD# = 0
Powerdown Current
IDDDIGPD
IDDOPD
VDDDIG, CKPWRGD_PD# = 0
VDD1.8, CKPWRGD_PD# = 0
1 Guaranteed by design and characterization, not 100% tested in production.
2 Input clock stopped.
2
0.2
23
0.001
0.17
0.4
MAX
3
0.5
27
0.1
0.3
0.8
UNITS
mA
mA
mA
mA
mA
mA
NOTES
2
2
2
MARCH 10, 2017
7
5-OUTPUT 1.8V HCSL FANOUT BUFFER