ICSSSTVA16857 Datasheet, PDF (6/9 Pages) Integrated Circuit Systems – DDR 14-Bit Registered Buffer

ICSSSTVA16857
DC Electrical Characteristics - DDRI-400 (PC3200)
T_A = 0 - 70°C; V_DD = 2.5 +/-0.2V, V_DDQ=2.5 +/-0.2V; (unless otherwise stated)
SYMBOL PARAMETERS
CONDITIONS
V_DDQ
V_IK
I_I = -18mA
2.5V
V_OH
I_OH = -100µA
I_OH = -8mA
V_OL
I_OL = 100µA
I_OL = 8mA
I_I
All Inputs
Standby (Static)
V_I = V_DD or GND
RESET# = GND
I_DD
Operating (Static)
V_I = V_IH(AC) or V_IL(AC),
RESET# = V_DD
Dynamic operating
(clock only)
RESET# = V_DD,
V_I = V_IH(AC) or V_IL(AC),
CLK and CLK# switching
50% duty cycle.
RESET# = V_DD,
I_O = 0
I_DDD
V_I = V_IH(AC) or V_{IL (AC)},
Dynamic Operating ^{CLK and CLK# switching}
(per each data input) ^{50% duty cycle. One data}
input switching at half
clock frequency, 50%
duty cycle
r_OH Output High
I_OH = -16mA
r_OL Output Low
I_OL = 16mA
r_O(D)
[r_OH - r_OL] each
separate bit
I_O = 20mA, T_A = 25° C
C_i
Data Inputs
CLK and CLK#
V_I = V_REF ±350mV
V_ICR = 1.25V, V_I(PP) = 360mV
Notes:
1 - Guaranteed by design, not 100% tested in production.
2.5V-2.7V
2.7V
2.5V-2.7V
2.5V
2.7V
2.7V
2.5V-2.7V
2.5V-2.7V
2.6V
2.6V
MIN
V_DDQ -
0.2
1.95
7
7
2.5
2.5
TYP MAX
-1.2
0.2
0.35
±5
0.01
25
30
10
13.5 20
13 20
4
3.5
3.5
UNITS
V
µA
µA
mA
µ/clock
MHz
µA/ clock
MHz/data
Ω
Ω
Ω
pF
0932A—05/12/04
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