ICS932SQ420DGLF Datasheet, PDF (6/27 Pages) Integrated Device Technology – PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS

932SQ420D
PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS
Pin Descriptions - 64 MLF
PIN #
PIN NAME
1 GNDPCI
2 VDDPCI
3 PCI4_2x
4 PCI3_2x
5 PCI2_2x
6 PCI1_2x
7 PCI0_2x
8 GNDPCI
9 VDDPCI
10 VDD48
11 ^48M_2x/100M_133M#
12 GND48
13 GND96
14 DOT96T
15 DOT96C
16 AVDD96
17 TEST_MODE
18 CKPWRGD#/PD
19 VDDSRC
TYPE
D ESC RIPTION
PWR Ground pin for PCI outputs and logic.
PWR 3.3V power for the PCI outputs and logic
OUT 3.3V PCI clock output
OUT 3.3V PCI clock output
OUT 3.3V PCI clock output
OUT 3.3V PCI clock output
OUT 3.3V PCI clock output
PWR Ground pin for PCI outputs and logic.
PWR 3.3V power for the PCI outputs and logic
PWR 3.3V power for the 48MHz output and logic
3.3V 48MHz output/ 3.3V tolerant CPU frequency select latched input pin. See VilFS and VihFS values for
I/O thresholds. This pin has a weak (~120Kom) internal pull up.
1 = 100MHz, 0 = 133MHz operating frequency
PWR Ground pin for 48MHz output and logic.
PWR Ground pin for DOT96 output and logic.
True clock of differential 96MHz output. These are current mode outputs. These are current mode outputs
OUT _{and external 33 ohm series resistors and 49.9 ohm shunt resistors are required for termination.}
Complementary clock of differential 96MHz output. These are current mode outputs and external 33 ohm
OUT _{series resistors and 49.9 ohm shunt resistors are required for termination.}
PWR 3.3V power for the 48/96MHz PLL and the 96MHz output and logic
TEST_MODE is a real time input to select between Hi-Z and REF/N divider mode while in test mode. Refer to
IN _{Test Clarification Table.}
CKPWRGD# is an active low input used to sample latched inputs and allow the device to Power Up. PD is an
IN asynchronous active high input pin used to put the device into a low power state. The internal clocks and PLLs
are stopped.
PWR 3.3V power for the SRC outputs and logic
20 SRC0T
OUT ^{True clock of differential SRC output. These are current mode outputs. These are current mode outputs and}
external 33 ohm series resistors and 49.9 ohm shunt resistors are required for termination.
21 SRC0C
22 GNDSRC
23 SRC1C
24 SRC1T
25 SRC2C
26 SRC2T
27 VDDSRC
28 AVDD_SRC
29 GNDSRC
30 IREF
31 NS_SRC0C
OUT ^{Complementary clock of differential SRC output. These are current mode outputs and external 33 ohm}
series resistors and 49.9 ohm shunt resistors are required for termination.
PWR Ground pin for SRC outputs and logic.
OUT ^{Complementary clock of differential SRC output. These are current mode outputs and external 33 ohm series}
resistors and 49.9 ohm shunt resistors are required for termination.
OUT ^{True clock of differential SRC output. These are current mode outputs. These are current mode outputs and}
external 33 ohm series resistors and 49.9 ohm shunt resistors are required for termination.
OUT
Complementary clock of differential SRC output. These are current mode outputs and
resistors and 49.9 ohm shunt resistors are required for termination.
external 33 ohm series
OUT
True clock of differential SRC output. These are current mode outputs. These are current mode outputs and
external 33 ohm series resistors and 49.9 ohm shunt resistors are required for termination.
PWR 3.3V power for the SRC outputs and logic
PWR 3.3V power for the SRC PLL analog circuits
PWR Ground pin for SRC outputs and logic.
This pin establishes the reference current for the differential current-mode output pairs. This pin requires a
OUT fixed precision resistor tied to ground in order to establish the appropriate current. 475 ohms is the standard
va lue .
OUT
Complementary clock of differential non-spreading SRC output. These are current mode outputs and
33 ohm series resistors and 49.9 ohm shunt resistors are required for termination.
ex tern al
32 NS_SRC0T
True clock of differential non-spreading SRC output. These are current mode outputs. These are current
OUT _{mode outputs and external 33 ohm series resistors and 49.9 ohm shunt resistors are required for termination.}
33 NS_SRC1C
Complementary clock of differential non-spreading SRC output. These are current mode outputs and external
OUT _{33 ohm series resistors and 49.9 ohm shunt resistors are required for termination.}
34 NS_SRC1T
True clock of differential non-spreading SR C output. These are current mode outputs. These are current
OUT _{mode outputs and external 33 ohm series resistors and 49.9 ohm shunt resistors are required for termination.}
IDT® PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS
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932SQ420D
REV H 042012