ICS932SQ420DGLF Datasheet, PDF (11/27 Pages) Integrated Device Technology – PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS

932SQ420D
PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS
AC Electrical Characteristics - Differential Current Mode Outputs
TA = T_COM; Supply Voltage VDD = 3.3 V +/-5%
PA RAM ETER
SYMBOL
C OND ITIONS
MIN
TYP
Duty Cycle
t_{D C}
Measured differentially, PLL
45
Mod e
50.1
Skew, Output to Output
t_{sk3 SRC}
Across all SRC outputs,
V_T = 50%
13.5
Skew, Output to Output
t_{sk3 CPU}
Across all CPU outputs,
V_T = 50%
43
Jitter, Cycle to cycle
t_{jc y c- c yc}
CPU, SRC, NS_SAS outputs
35
DOT96 output
75
1_{Guaranteed by design and characterization, not 100% tested in production.}
2 _{IREF = VDD/(3xRR). For RR = 475Ω (1%), IREF = 2.32mA. IOH = 6 x IREF and VOH = 0.7V @ ZO=50Ω.}
3 _{Measured from differential waveform}
MAX
55
50
50
50
250
UNITS NOTES
%
1
ps
1
ps
1
ps
1,3
ps
1,3
Electrical Characteristics - Phase Jitter Parameters
T_A = 0 - 70°C; Supply Voltage V_DD/V_DDA = 3.3 V +/-5%,
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS Notes
t_jphPCIeG1
t_jphPCIeG2
PCIe Gen 1
PCIe Gen 2 Lo Band
10kHz < f < 1.5MHz
PCIe Gen 2 High Band
1.5MHz < f < Nyquist (50MHz)
28
86 ps (p-p) 1,2,3,6
0.9
3
ps
1,2,6
(rms)
1.7
3.1
ps
1,2,6
(rms)
t_jphPCIeG3
PCIe Gen 3
(PLL BW of 2-4MHz, CDR =
10MHz)
0.4
1
ps
(rms) ^1,2,4,6
Phase Jitter
QPI & SMI
(100MHz or 133MHz, 4.8Gb/s,
6.4Gb/s 12UI)
ps
0.15
0.5
(rms) ^1,5,7
t_{jphQPI_SMI}
QPI & SMI
(100MHz, 8.0Gb/s, 12UI)
0.13
0.3
ps
1,5,7
(rms)
QPI & SMI
(100MHz, 9.6Gb/s, 12UI)
0.11
0.2
ps
1,5,7
(rms)
t_jphSAS12G
SAS12G
(Filtered REFCLK Jitter 20KHz
to 20MHz.)
0.34
0.4
ps
(rms)
1,8,9
t_jphSAS12G
SAS 12G
ps
0.70
1.3
(rms) ^1,5,8
1 _{Guaranteed by design and characterization, not 100% tested in production.}
2 _{See http://www.pcisig.com for complete specs}
3 _{Sample size of at least 100K cycles. This figures extrapolates to 108ps pk-pk @ 1M cycles for a BER of 1-12.}
4 _{Subject to final radification by PCI SIG.}
5 _{Calculated from Intel-supplied Clock Jitter Tool v 1.6.6}
6 _{Applied to SRC outputs}
7 _{Applies to CPU outputs}
8 _{Applies to NS_SAS, NS_SRC outputs, Spread Off}
9 _{Intel calculation from raw phase noise data}
IDT® PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS
11
932SQ420D
REV H 042012