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ICS831742I Datasheet, PDF (6/18 Pages) Integrated Device Technology – Maximum input/output clock frequency
ICS831742I Data Sheet
4:2 DIFFERENTIAL CLOCK/DATA MULTIPLEXER
Table 5B. HCSL AC Characteristics, VDD = 3.3V ± 0.3V, TA = -40°C to 85°C
Symbol
Parameter
Test Conditions
fOUT
tPD
tsk(o)
Output Frequency
Propagation Delay; NOTE 1
Output Skew; NOTE 16
Across All Outputs
tsk(i)
Input Skew; NOTE 13
Any Input to Q/nQ
tsk(pp)
Part-to-Part Skew; NOTE 14, 15
MUXISOL
Rising
Edge Rate
Mux Isolation
Rising Edge Rate; NOTE 2, 3
f = 100MHz
f = 100MHz
Falling
Edge Rate
Falling Edge Rate; NOTE 2, 3
f = 100MHz
VRB
VMAX
Ringback Voltage; NOTE 2, 4
Absolute Max Output Voltage;
NOTE 5, 6
f = 100MHz
f = 100MHz
VMIN
Absolute Min Output Voltage;
NOTE 5, 7
f = 100MHz
VCROSS
Absolute Crossing Voltage;
NOTE 5, 8, 9
f = 100MHz
VCROSS
Total Variation of VCROSS over all
edges; NOTE 5, 8, 10
f = 100MHz
odc
Output Duty Cycle; NOTE 11
f  200MHz
Minimum
1.5
Typical
2
3
30
40
Maximum
700
2.5
15
110
225
Units
MHz
ns
ps
ps
ps
dB
0.6
4
V/ns
0.6
-100
4
100
1150
V/ns
mV
mV
-300
mV
250
550
mV
140
mV
48
50
52
%
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE 1: Measured from the differential input cross point to the differential output crossing point.
NOTE 2: Measurement taken from differential waveform.
NOTE 3: Measurement from -150mV to +150mV on the differential waveform (derived from QX minus nQX). The signal must be monotonic
through the measurement region for rise and fall time. The 300mV measurement window is centered on the differential zero crossing.
NOTE 4: TSTABLE is the time the differential clock must maintain a minimum ±150mV differential voltage after rising/falling edges before it is
allowed to drop back into the VRB = ±100 differential range. See Parameter Measurement Information Section.
NOTE 5: Measurement taken from single-ended waveform.
NOTE 6: Defined as the maximum instantaneous voltage including overshoot. See Parameter Measurement Information Section.
NOTE 7: Defined as the minimum instantaneous voltage including undershoot. See Parameter Measurement Information Section.
NOTE 8: Measured at crossing point where the instantaneous voltage value of the rising edge of QX equals the falling edge of nQX.
See Parameter Measurement Information Section
NOTE 9: Refers to the total variation from the lowest crossing point to the highest, regardless of which edge is crossing. Refers to all crossing
points for this measurement. See Parameter Measurement Information Section.
NOTE 10: Defined as the total variation of all crossing voltage of rising QX and falling nQX. This is the maximum allowed variance in the
VCROSS for any particular system. See Parameter Measurement Information Section.
NOTE 11: Input duty cycle must be 50%.
NOTE 12: Matching applies to rising edge rate for QX and falling edge rate for nQX. It is measured using a ±75mV window centered on the
median crosspoint where QX meets nQX falling. The median crosspoint is used to calculate the voltage thresholds the oscilloscope is to use
for the edge rate calculations. The rise edge rate of QX should be compared to the fall edge rate of nQX, the maximum allowed difference
should not exceed 20% of the slowest edge rate.
NOTE 13: Defined as skew between input paths on the same device, using the same input signal levels, measured at one specific output at
the differential cross points.
NOTE 14: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 15: Defined as skew between outputs on different devices operating at the same supply voltage and with equal load conditions. Using
the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 16: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the differential cross
points.
ICS831742AGI JULY 10, 2012
6
©2012 Integrated Device Technology, Inc.