ICS831742I Datasheet, PDF (14/18 Pages) Integrated Device Technology – Maximum input/output clock frequency

ICS831742I Data Sheet
4:2 DIFFERENTIAL CLOCK/DATA MULTIPLEXER
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS831742I.
Equations and example calculations are also provided.
1.Power Dissipation.
The total power dissipation for the ICS831742I is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V_DD = 3.3V + 0.3V = 3.6V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
• Power (core)_MAX = V_{DD_MAX} * I_{DD_MAX}= 3.6V * 26mA = 93.6mW
• Power (outputs)_MAX = 46.8mW/Loaded Output pair
If all outputs are loaded, the total power is 2 * 46.8mW = 93.6mW
Total Power__MAX = 93.6mW + 93.6mW = 187.2mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. The
maximum recommended junction temperature for devices is 125°C.
The equation for Tj is as follows: Tj = _JA * Pd_total + T_A
Tj = Junction Temperature
_JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T_A = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance _JA must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 87.8°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.187W * 87.8°C/W = 101.4°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (single layer or multi-layer).
Table 6. Thermal Resistance _JA for 24 Lead TSSOP, Forced Convection
_JA vs. Air Flow
Meters per Second
0
Multi-Layer PCB, JEDEC Standard Test Boards
87.8°C/W
1
83.5°C/W
2.5
81.3°C/W
ICS831742AGI JULY 10, 2012
14
©2012 Integrated Device Technology, Inc.