845254 Datasheet, PDF (6/20 Pages) Integrated Device Technology – FemtoClock Crystal-to-3.3V, 2.5V

845254 Data Sheet
FEMTOCLOCK^® CRYSTAL-TO-CML CLOCK GENERATOR
AC Characteristics
Table 6. AC Characteristics, V_DD = 3.3V±5% or 2.5V±5%, T_A = -40°C to 85°C
Symbol Parameter
Test Conditions
FBSEL = 0, FSEL[1:0] = 00
FBSEL = 0, FSEL[1:0] = 01
FBSEL = 0, FSEL[1:0] = 10
f_OUT
Output Frequency; NOTE 1
FBSEL = 0, FSEL[1:0] = 11
FBSEL = 1, FSEL[1:0] = 00
FBSEL = 1, FSEL[1:0] = 01
FBSEL = 1, FSEL[1:0] = 10
FBSEL = 1, FSEL[1:0] = 11
tsk(o)
Output Skew; NOTE 1, 2, 3
3.3V, f_OUT = 125MHz,
Integration Range: 1.875MHz – 20MHz
tjit(Ø)
RMS Phase Jitter (Random);
NOTE 4
3.3V, f_OUT = 156.25MHz,
Integration Range: 1.875MHz – 20MHz
2.5V, f_OUT = 125MHz,
Integration Range: 1.875MHz – 20MHz
2.5V, f_OUT = 156.25MHz,
Integration Range: 1.875MHz – 20MHz
t_R / t_F
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
FSEL[1:0] = 10
FSEL[1:0]  10
Minimum
Typical
312.5
156.25
125
62.5
250
125
100
50
Maximum
65
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
ps
0.405
ps
0.381
ps
0.400
ps
0.401
ps
250
800
ps
45
55
%
48
52
%
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device
is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal
equilibrium has been reached under these conditions.
NOTE: Characterized using an 18pF, 25MHz crystal.
NOTE 1: f_REF = 25MHz.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the output differential
cross points.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 4: Please refer to the phase noise plots.
845254 REVISION B 08/25/15
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