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ICS85408I Datasheet, PDF (5/16 Pages) Integrated Device Technology – Low Skew, 1-to-8, Differential-to-LVDS Clock
ICS85408I Datasheet
LOW SKEW, 1-TO-8, DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP
Table 4D. LVDS DC Characteristics, VDD = 3.3V ± 5%, TA = -40°C to 85°C
Symbol Parameter
Test Conditions
VOD
∆VOD
VOS
∆VOS
IOz
IOFF
IOSD
Differential Output Voltage
VOD Magnitude Change
Offset Voltage
VOS Magnitude Change
High Impedance Leakage
Power Off Leakage
Differential Output Short
Circuit Current
RL = 100Ω
RL = 100Ω
RL = 100Ω
RL = 100Ω
IOS/IOSB Output Short Circuit Current
Minimum
250
1.125
-10
-1
Typical
400
1.4
Maximum
600
50
1.6
50
+10
+1
-5.5
-12
Units
mV
mV
V
mV
µA
µA
mA
mA
Table 5. AC Characteristics, VDD = 3.3V ± 5%, TA = -40°C to 85°C
Symbol Parameter
Test Conditions
fMAX
tPD
tjit
Output Frequency
Propagation Delay; NOTE 1
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter
Section
156.25MHz,
Integration Range: (12kHz – 20MHz)
tsk(o)
Output Skew; NOTE 2, 4
tsk(pp) Part-to-Part Skew; NOTE 3, 4
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
tPZL, tPZH Output Enable Time; NOTE 5
tPLZ, tPHZ Output Disable Time; NOTE 5
Minimum
1.6
Typical
Maximum
700
2.4
Units
MHz
ns
167
fs
50
ps
550
ps
50
600
ps
45
55
%
5
ns
5
ns
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE: All parameters measured at fMAX unless noted otherwise.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the differential crossing
point of the input to the differential output crossing point.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions. Using
the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 5: These parameters are guaranteed by characterization. Not tested in production.
ICS85408BGI REVISION B JULY 2, 2009
5
©2009 Integrated Device Technology, Inc.