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| ICS8344-01_07 Datasheet, PDF (5/15 Pages) Integrated Device Technology – Low Skew, 1-to-24 Differential-to-LVCMOS/LVTTL Fanout Buffer | |||
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ICS8344I-01 Data Sheet
LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER
Table 4C. Differential DC Characteristics, VDD = VDDO = 3.3V ± 5%, or VDD = VDDO = 2.5V ± 5%, or
VDD = 3.3V ± 5%, VDDO = 2.5V ± 5%, TA = -40°C to 70°C
Symbol Parameter
Test Conditions
Minimum Typical
IIH
IIL
VPP
VCMR
Input
High Current
nCLK0, nCLK1
CLK0, CLK1
Input
Low Current
nCLK0, nCLK1
CLK0, CLK1
Peak-to-Peak Voltage; NOTE 1
Common Mode Input Voltage;
NOTE 1, 2
VDD = VIN = 3.465V or 2.625V
VDD = VIN = 3.465V or 2.625V
VDD = 3.465V or 2.625V, VIN = 0V
VDD = 3.465V or 2.625V, VIN = 0V
-150
-5
0.3
0.9
NOTE 1: VIL should not be less than -0.3V.
NOTE 2: Common mode input voltage is defined as VIH.
Maximum
5
150
1.3
2.0
Units
µA
µA
µA
µA
V
V
AC Electrical Characteristics
Table 5. AC Characteristics, VDD = VDDO = 3.3V ± 5%, or VDD = VDDO = 2.5V ± 5%, or
VDD = 3.3V ± 5%, VDDO = 2.5V ± 5%, TA = -40°C to 70°C
Symbol Parameter
Test Conditions
Minimum
fOUT
Output Frequency
tPD
Propagation Delay; NOTE 1
f ⤠100MHz
2.5
tjit
Buffer Additive Phase Jitter,
RMS; refer to Additive Phase
Jitter Section
100MHz,
Integration Range: 12kHz â 20MHz
tsk(b)
Bank Skew;
NOTE 2, 6
Q[0:7]
Q[8:15]
Q[16:23]
Measured on the rising edge of VDDO/2
tsk(o)
Output Skew; NOTE 3, 6
Measured on the rising edge of VDDO/2
tsk(pp) Part-to-Part Skew; NOTE 4, 6
Measured on the rising edge of VDDO/2
tR / tF
Output Rise/Fall Time; NOTE 5
30% to 70%
200
tEN
Output Enable Time; NOTE 5
f = 10MHz
tDIS
Output Disable Time; NOTE 5
f = 10MHz
odc
Output Duty Cycle
f ⤠100MHz
45
Typical
Maximum
100
5
0.21
155
180
140
200
900
800
5
4
55
Units
MHz
ns
ps
ps
ps
ps
ps
ps
ps
ns
ns
%
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE: All parameters measured at â¤100MHz and VPP_typ unless noted otherwise.
NOTE 1: Measured from the differential input crossing point to VDDO/2.
NOTE 2: Defined as skew within a bank of outputs at the same voltages and with equal load conditions.
NOTE 3: Defined as skew across banks of outputs at the same supply voltages and with equal load conditions.
NOTE 4: Defined as between outputs at the same supply voltages and with equal load conditions. Measured at VDDO/2.
NOTE 5: These parameters are guaranteed by characterization. Not tested in production.
NOTE 6: This parameter is defined in accordance with JEDEC Standard 65.
ICS8344AYI-01 REVISION A FEBRUARY 29, 2012
5
©2012 Integrated Device Technology, Inc.
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