ICS8344-01_07 Datasheet, PDF (10/15 Pages) Integrated Device Technology – Low Skew, 1-to-24 Differential-to-LVCMOS/LVTTL Fanout Buffer

ICS8344I-01 Data Sheet
LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER
Differential Clock Input Interface
The CLKx /nCLKx accepts LVDS, LVPECL, LVHSTL, HCSL and
other differential signals. Both signals must meet the V_PP and V_CMR
input requirements. Figures 2A to 2E show interface examples for the
CLKx/nCLKx input driven by the most common driver types. The
input interfaces suggested here are examples only. Please consult
with the vendor of the driver component to confirm the driver
termination requirements. For example, in Figure 2A, the input
termination applies for IDT open emitter LVHSTL drivers. If you are
using an LVHSTL driver from another vendor, use their termination
recommendation.
1.8V
Zo = 50Ω
Zo = 50Ω
LVHSTL
IDT
LVHSTL Driver
3.3V
CLK
R1
R2
50Ω
50Ω
nCLK
Differential
Input
Figure 2A. CLK/nCLK Input Driven by an
IDT Open Emitter LVHSTL Driver
3.3V
LVPECL
Zo = 50Ω
Zo = 50Ω
3.3V
R3
125Ω
R4
125Ω
3.3V
CLK
nCLK
Differential
R1
R2
84Ω
84Ω
Input
3.3V
LVPECL
Zo = 50Ω
Zo = 50Ω
3.3V
CLK
R1
R2
50Ω
50Ω
nCLK
Differential
Input
R2
50Ω
Figure 2B. CLK/nCLK Input Driven by a
3.3V LVPECL Driver
3.3V
LVDS
Zo = 50Ω
Zo = 50Ω
3.3V
R1
100Ω
CLK
nCLK
Receiver
Figure 2C. CLK/nCLK Input Driven by a
3.3V LVPECL Driver
Figure 2D. CLK/nCLK Input Driven by a
3.3V LVDS Driver
3.3V
3.3V
*R3 33Ω
Zo = 50Ω
Zo = 50Ω
*R4 33Ω
HCSL
R1
50Ω
*Optional – R3 and R4 can be 0Ω
CLK
nCLK
R2
50Ω
Differential
Input
Figure 2E. CLK/nCLK Input Driven by a
3.3V HCSL Driver
ICS8344AYI-01 REVISION A FEBRUARY 29, 2012
10
©2012 Integrated Device Technology, Inc.