ICS810251 Datasheet, PDF (5/15 Pages) Integrated Device Technology – VCXO and Synchronous Ethernet Jitter Attenuator

ICS810251I Data Sheet
VCXO AND SYNCHRONOUS ETHERNET JITTER ATTENUATOR
Table 4B. AC Characteristics, V_DD = V_DDO = 2.5V ± 5%, T_A = -40°C to 85°C
Symbol Parameter
Test Conditions
Minimum
f_REF
Input Reference Frequency
f_VCO
f_OUT
t_JIT(CC)
tjit
VCXO-PLL Frequency
Output Frequency
Cycle-to-Cycle Jitter; NOTE 1
RMS Phase Jitter (Random);
NOTE 2
f_OUT = 25MHz, Integration Range:
1kHz – 1MHz
t_JIT(PER) Period jitter
t_R / t_F
Output Rise/Fall Time
20% to 80%
700
odc
Output Duty Cycle; NOTE 3
48
odc
Output Duty Cycle; NOTE 4
44
Typical
25
125
25
25
0.24
Maximum
35
10
2200
52
56
Units
MHz
MHz
MHz
MHz
ps
ps
ps
ps
%
%
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. Device will meet specifications after thermal equilibrium has
been reached under these conditions.
NOTE: Characterized using a 616Hz bandwidth filter.
NOTE 1: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 2: Please refer to the Phase Noise Plot.
NOTE 3: Specified with the VCXO-PLL free running high.
NOTE 4: Specified with the VCXO-PLL locked.
ICS810251AGI REVISION B OCTOBER 5, 2012
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©2012 Integrated Device Technology, Inc.