932SQ420DGLFT Datasheet, PDF (5/27 Pages) Integrated Device Technology – PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS

932SQ420D
PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS
Pin Configuration - 64 MLF
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
GNDPCI ₁
48 GNDCPU
VDDPCI 2
47 VDDCPU
PCI4_2x 3
46 CPU1T
PCI3_2x 4
45 CPU1C
PCI2_2x 5
44 CPU0T
PCI1_2x ₆
43 CPU0C
PCI0_2x 7
42 GNDNS
GNDPCI 8
VDDPCI 9
932SQ420
41 AVDD_NS_SAS
40 NS_SAS1T
VDD48 10
39 NS_SAS1C
^48M_2x/100M_133M# 11
38 NS_SAS0T
GND48 12
37 NS_SAS0C
GND96 13
36 GNDNS
DOT96T 14
35 VDDNS
DOT96C 15
34 NS_SRC1T
AVDD96 16
33 NS_SRC1C
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Note: Pins with ^ prefix have internal 120K pullup
Pins with v prefix have internal 120K pulldowm
IDT® PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS
5
932SQ420D
REV H 042012