932SQ420DGLFT Datasheet, PDF (19/27 Pages) Integrated Device Technology – PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS

932SQ420D
PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS
Line
0
1
2
3
4
5
6
7
8
9
10
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13
14
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18
19
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NS_SAS Margining Table
Byte5 Byte5 Byte5 Byte5 Byte5
Bit4 Bit3 Bit2 Bit1 Bit0
FS4 FS3 FS2 FS1 FS0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
0
1
1
0
0
1
0
0
0
0
1
0
1
0
0
1
1
0
0
0
1
1
1
0
1
0
0
0
0
1
0
0
1
0
1
0
1
0
0
1
0
1
1
0
1
1
0
0
0
1
1
0
1
0
1
1
1
0
0
1
1
1
1
1
0
0
0
0
1
0
0
0
1
1
0
0
1
0
1
0
0
1
1
1
0
1
0
0
1
0
1
0
1
1
0
1
1
0
1
0
1
1
1
1
1
0
0
0
1
1
0
0
1
1
1
0
1
0
1
1
0
1
1
1
1
1
0
0
1
1
1
0
1
1
1
1
1
0
1
1
1
1
1
N S_xx x
(MH z)
58.33
61.11
63.89
66.67
69.44
72.22
75.00
77.78
80.56
83.33
86.11
88.89
91.67
94.44
97.22
100.0 0
102.7 8
105.5 6
108.3 3
111.1 1
113.8 9
116.6 7
119.4 4
122.2 2
125.0 0
127.7 8
130.5 6
133.3 3
136.1 1
138.8 9
141.6 7
144.4 4
NOTE: Operation at other than the default entry is not
guaranteed. These values are for margining purposes only.
IDT® PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS
19
932SQ420D
REV H 042012