ICSSSTUB32864A Datasheet, PDF (4/12 Pages) Integrated Device Technology – 25-Bit Configurable Registered Buffer for DDR2

ICSSSTUB32864A
Advance Information
Block Diagram for 1:1 mode (positive logic)
RST#
CK
CK#
V_REF
DCKE
DODT
DCS#
CSR#
D
C1
R
D
C1
R
1D
C1
R
QCKEA
QODTA
QCSA#
D1
0
1
1166—10/05/05
To 21 Other Channels
*Note: Disabled in 1:1 configuration
4
1D
C1
R
Q1A
Q1B^*