84427 Datasheet, PDF (4/16 Pages) Integrated Device Technology – Crystal-to-LVDS Integrated Frequency Synthesizer/Fanout Buffer

84427 DATA SHEET
TABLE 4. CRYSTAL CHARACTERISTICS
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
Test Conditions
Minimum Typical Maximum
Fundamental
19.44
25.5
50
7
1
Units
MHz
Ω
pF
mW
TABLE 5. AC CHARACTERISTICS, V_DD = V_DDA = 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
F_OUT
Output Frequency
77.76
tjit(Ø)
RMS Phase Jitter (Random);
NOTE 1
155.52MHz,
(Integration Range: 12kHz-20MHz)
156.25MHz,
(Integration Range: 12kHz-20MHz)
3.4
3.1
tjit(cc) Cycle-to-Cycle Jitter; NOTE 2
625
MHz
ps
ps
36
ps
tsk(o) Output Skew; NOTE 3, 4
85
ps
t_{R /} t_F
Output Rise/Fall Time
odc
Output Duty Cycle
20% to 80%
200
47
600
ps
52
%
t_LOCK
PLL Lock Time
See Parameter Measurement Information section.
NOTE 1: See Phase Noise Plots.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential crossing points.
1
ms
CRYSTAL-TO-LVDS
4
INTEGRATED FREQUENCY SYNTHESIZER/FANOUT BUFFER
REVISION B 5/6/15