844008I-46 Datasheet, PDF (4/16 Pages) Integrated Device Technology – FemtoClock Crystal-to-LVDS Clock Generator

844008I-46 DATA SHEET
TABLE 5. CRYSTAL CHARACTERISTICS
Parameter
Test Conditions
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
NOTE: Characterized using an 18pF parallel resonant crystal.
Minimum Typical Maximum
Fundamental
25
50
7
300
Units
MHz
Ω
pF
µW
TABLE 6. AC CHARACTERISTICS, V = V = 2.5V±5%, TA = -40°C TO 85°C
DD
DDO
Symbol Parameter
Test Conditions
Minimum Typical
f
Output Frequency
OUT
FREQ_SEL = 0
FREQ_SEL = 1
156.25
100
tsk(o) Output Skew; NOTE 1, 2
tjit(cc) Cycle-to-Cycle Jitter
tjit(Ø)
RMS Phase Jitter (Random);
NOTE 3
156.25MHz (1.875MHz - 20MHz)
100MHz (1.875MHz - 20MHz)
0.45
0.52
t /t
RF
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
300
48
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at the differential cross points.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Please refer to the Phase Noise Plot.
Maximum Units
MHz
MHz
75
ps
20
ps
ps
ps
700
ps
52
%
FEMTOCLOCK™ CRYSTAL-TO-LVDS
4
CLOCK GENERATOR
REVISION A 11/6/15