ICS841654I Datasheet, PDF (2/17 Pages) Integrated Device Technology – FEMTOCLOCKS™ CRYSTAL-TO-HCSL CLOCK GENERATOR

ICS841654I
FEMTOCLOCKS™ CRYSTAL-TO-HCSL CLOCK GENERATOR
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 18
2
V_DD
REF_OUT
Power
Output
Core supply pins.
Single-ended reference frequency clock output.
LVCMOS/LVTTL interface levels.
3, 7, 15, 22
GND
Power
Power supply ground.
4, 5,
8, 9
QA0, nQA0,
QA1, nQA1
Ouput
Differential Bank A output pairs. HCSL interface levels.
6
V_DDOA
Power
Output supply pin for Bank A outputs.
10
nREF_OE Input
Pullup
Active low REF_OUT enable/disable. See Table 3E.
LVCMOS/LVTTL interface levels.
11
BYPASS
Input
Pulldown
Selects PLL operation/PLL bypass operation.
See Table 3C. LVCMOS/LVTTL interface levels.
12
REF_IN
Input
Pulldown
Single-ended PLL reference clock input.
LVCMOS/LVTTL interface levels.
13
REF_SEL
Input
Pulldown
Reference select. Selects the input reference source.
See Table 3B. LVCMOS/LVTTL interface levels.
14
16, 17
19
20, 21
24, 25
V_DDA
XTAL_OUT,
XTAL_IN
MR/nOE
nQB1, QB1
nQB0, QB0
Power
Input
Input
Output
Analog supply pin.
Parallel resonant crystal interface. XTAL_OUT is the output,
XTAL_IN is the input. (PLL reference.)
Pulldown
Active HIGH master reset. Active LOW output enable. When logic HIGH,
the internal dividers are reset and the differential outputs are in high
impedance (HiZ). When logic LOW, the internal dividers and the
differential outputs are enabled. See Table 3D. LVCMOS/LVTTL interface
levels.
Differential Bank B output pairs. HCSL interface levels.
23
26, 27
28
V_DDOB
FSEL1,
FSEL0
IREF
Power
Output supply pin for Bank B outputs.
Input Pulldown Output frequency select pins. LVCMOS/LVTTL interface levels.
Output
HCSL current reference external resistor output. A fixed precision resistor
(RREF = 475Ω) from this pin to ground provides a reference current used
for differential current-mode QA[0:1]/nQA[0:1] and QB[0:1]/nQB[0:1] clock
outputs.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
C_IN
R_PULLUP
R
PULLDOWN
Parameter
Input Capacitance
Input PullupResistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
kΩ
kΩ
IDT^™ / ICS^™ HCSL CLOCK GENERATOR
2
ICS841654AGI REV. A APRIL 17, 2008