ICS841654I Datasheet, PDF (13/17 Pages) Integrated Device Technology – FEMTOCLOCKS™ CRYSTAL-TO-HCSL CLOCK GENERATOR

ICS841654I
FEMTOCLOCKS™ CRYSTAL-TO-HCSL CLOCK GENERATOR
3. Calculations and Equations.
The purpose of this section is to calculate power dissipation on the IC per HCSL output pair.
HCSL output driver circuit and termination are shown in Figure 4.
VDD
I_OUT = 17mA
R_REF =
475Ω ± 1%
IC
V_OUT
R_L
50Ω
FIGURE 4. HCSL DRIVER CIRCUIT AND TERMINATION
HCSL is a current steering output which sources a maximum of 17mA of current per output. To calculate worst case on-chip power
dissipation, use the following equations which assume a 50Ω load to ground.
The highest power dissipation occurs when V is HIGH.
DD
Power = (V – V ) * I since V = I * R
DD_HIGH
OUT
OUT,
OUT
OUT
L
= (V – I * R ) * I
DD_HIGH
OUT
L
OUT
= (3.465V – 17mA * 50Ω) * 17mA
Total Power Dissipation per output pair = 50.06mW
IDT^™ / ICS^™ HCSL CLOCK GENERATOR
13
ICS841654AGI REV. A APRIL 17, 2008