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841N254B Datasheet, PDF (2/24 Pages) Integrated Device Technology – FemtoClock NG Crystal-to-LVDS/ HCSL Clock Synthesizer
841N254B Datasheet
Pin Description and Pin Characteristic Tables
Table 1. Pin Descriptions
Number
1, 8, 13, 32
2, 4
3
5, 17,
23, 25, 31
6
7
Name
VDD
nc
VDDA
GND
REF_CLK
nOEA
Type
Power
Unused
Power
Description
Core supply pins.
No connect.
Analog power supply.
Power
Power supply ground.
Input
Input
Pulldown Alternative single-ended reference clock input. LVCMOS/LVTTL interface levels.
Pulldown Output enable input. See Table 3D for function. LVCMOS/LVTTL interface levels.
9
nOEB
Input
Pulldown Output enable input. See Table 3E for function. LVCMOS/LVTTL interface levels.
10
REF_SEL
Input
Pulldown Reference select input. See Table 3B for function. 
LVCMOS/LVTTL interface levels.
11,
12
XTAL_IN,
XTAL_OUT
Input
Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output.
14
BYPASS
Input
Pulldown Bypass mode select pin. See Table 3C for function. 
LVCMOS/LVTTL interface levels.
15,
16
F_SEL0,
F_SEL1
Input
Pulldown Frequency select pin. See Table 3A for function. LVCMOS/LVTTL interface levels.
18, 19
20
21, 22
24
QA1, nQA1
VDDOA
QA0, nQA0
IREF
Output
Power
Output
Input
Differential clock output. LVDS interface levels.
Output supply pin for QAx outputs.
Differential clock output. LVDS interface levels.
External fixed precision resistor (475) from this pin to ground provides a reference
current used for differential current-mode QBx, nQBx clock outputs.
26, 27
28
29, 30
nQB1, QB1
VDDOB
nQB0, QB0
Output
Power
Output
Differential clock output. HCSL interface levels.
Output supply pin for QBx outputs.
Differential clock output. HCSL interface levels.
NOTE: Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Symbol
Parameter
CIN
Input Capacitance
RPULLDOWN Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
100
Maximum
Units
pF
k
©2016 Integrated Device Technology, Inc.
2
Revision B, May 23, 2016