841N254B Datasheet, PDF (10/24 Pages) Integrated Device Technology – FemtoClock NG Crystal-to-LVDS/ HCSL Clock Synthesizer

841N254B Datasheet
Parameter Measurement Information, continued
Phase Noise Plot
Phase Noise Mask
f₁ ^{Offset Frequency} f₂
RMS Jitter = Area Under the Masked Phase Noise Plot
RMS Phase Jitter
nQA[0:1]
QA[0:1]
LVDS Output Duty Cycle/Pulse Width/Period
nQx
Qx
nQy
Qy
Output Skew
nQX0
QX1
nQX0
QX1
t sk(b)
Where X = Bank A or Bank B
Bank Skew
+150mV
VRB = +100mV
0.0V
VRB = -100mV
-150mV
Q - nQ
T_STABLE
V_RB
V_RB
T_STABLE
Differential Measurement Points for Ringback
Differential Measurement Points for Duty Cycle/Period
©2016 Integrated Device Technology, Inc.
10
Revision B, May 23, 2016