8413S12I-100_16 Datasheet, PDF (19/33 Pages) Integrated Device Technology – Clock Generator for Cavium Processors

8413S12I-100 Data Sheet
Recommended Termination
Figure 4A is the recommended source termination for applications
where the driver and receiver will be on a separate PCBs. This
termination is the standard for PCI Express™ and HCSL output
types. All traces should be 50Ω impedance single-ended or 100Ω
differential.
0.5" Max
L1
Rs
22 to 33 +/-5%
0-0.2"
L2
L1
PCI Expres s
Driver
L2
0-0.2" L3 L3
1-14"
L4
L4
PCI Expres s
C o n n e cto r
0.5 - 3.5"
L5
L5
PCI Expres s
Add-in Card
Rt
49.9 +/- 5%
Figure 4A. Recommended Source Termination (where the driver and receiver will be on separate PCBs)
Figure 4B is the recommended termination for applications where
a point-to-point connection can be used. A point-to-point
connection contains both the driver and the receiver on the same
PCB. With a matched termination at the receiver,
transmission-line reflections will be minimized. In addition,
a series resistor (Rs) at the driver offers flexibility and can help
dampen unwanted reflections. The optional resistor can range
from 0Ω to 33Ω. All traces should be 50Ω impedance
single-ended or 100Ω differential.
0.5" Max
L1
L1
PCI Expres s
Driver
Rs
0 to 33
0 to 33
0-18"
L2
L2
Rt
0-0.2"
L3
L3
49.9 +/- 5%
Figure 4B. Recommended Termination (where a point-to-point connection can be used)
©2016 Integrated Device Technology, Inc.
19
October 4, 2016