ICS8543I Datasheet, PDF (14/17 Pages) Integrated Device Technology – Four differential LVDS output pairs

ICS8543I Data Sheet
Reliability Information
Table 7. _JA vs. Air Flow Table for a 20 Lead TSSOP
_JA by Velocity
Linear Feet per Minute
0
Single-Layer PCB, JEDEC Standard Test Boards
114.5°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
73.2°C/W
Transistor Count
The transistor count for ICS8543I is: 636
LOW SKEW, 1-to-4, DIFFERENTIAL-TO-LVDS FANOUT BUFFER
200
98.0°C/W
66.6°C/W
500
88.0°C/W
63.5°C/W
Package Outline and Package Dimensions
Package Outline - G Suffix for 20 Lead TSSOP
Table 8. Package Dimensions
Symbol
N
A
A1
A2
b
c
D
E
E1
e
L

aaa
All Dimensions in Millimeters
Minimum
Maximum
20
1.20
0.05
0.15
0.80
1.05
0.19
0.30
0.09
0.20
6.40
6.60
6.40 Basic
4.30
4.50
0.65 Basic
0.45
0.75
0°
8°
0.10
Reference Document: JEDEC Publication 95, MO-153
ICS8543BGI REVISION E NOVEMBER 15, 2012
14
©2012 Integrated Device Technology, Inc.