ICS8543I Datasheet, PDF (12/17 Pages) Integrated Device Technology – Four differential LVDS output pairs

ICS8543I Data Sheet
LOW SKEW, 1-to-4, DIFFERENTIAL-TO-LVDS FANOUT BUFFER
Recommendations for Unused Input and Output Pins
Inputs:
CLK/nCLK Inputs
For applications not requiring the use of the differential input, both
CLK and nCLK can be left floating. Though not required, but for
additional protection, a 1k resistor can be tied from CLK to ground.
PCLK/nPCLK Inputs
For applications not requiring the use of the differential input, both
PCLK and nPCLK can be left floating. Though not required, but for
additional protection, a 1k resistor can be tied from PCLK to
ground.
LVCMOS Control Pins
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional protection.
A 1k resistor can be used.
Outputs:
LVDS Outputs
All unused LVDS output pairs can be either left floating or terminated
with 100 across. If they are left floating, there should be no trace
attached.
LVDS Driver Termination
For a general LVDS interface, the recommended value for the
termination impedance (Z_T) is between 90 and 132. The actual
value should be selected to match the differential impedance (Z₀) of
your transmission line. A typical point-to-point LVDS design uses a
100 parallel resistor at the receiver and a 100 differential
transmission-line environment. In order to avoid any
transmission-line reflection issues, the components should be
surface mounted and must be placed as close to the receiver as
possible. IDT offers a full line of LVDS compliant devices with two
types of output structures: current source and voltage source. The
standard termination schematic as shown in Figure 5A can be used
with either type of output structure. Figure 5B, which can also be
used with both output types, is an optional termination with center tap
capacitance to help filter common mode noise. The capacitor value
should be approximately 50pF. If using a non-standard termination, it
is recommended to contact IDT and confirm if the output structure is
current source or voltage source type. In addition, since these
outputs are LVDS compatible, the input receiver’s amplitude and
common-mode input range should be verified for compatibility with
the output.
LVDS
Driver
Z_O  Z_T
Figure 5A. Standard Termination
LVDS
Z_T
Receiver
LVDS
Driver
Z_O  Z_T
Figure 5B. Optional Termination
LVDS Termination
ICS8543BGI REVISION E NOVEMBER 15, 2012
Z_T
2 _LVDS
C
Z_T Receiver
2
12
©2012 Integrated Device Technology, Inc.