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ICS87004I Datasheet, PDF (12/15 Pages) Integrated Device Technology – Output frequency range
ICS87004I Data Sheet
1:4, DIFFERENTIAL-TO-LVCMOS/LVTTL ZERO DELAY CLOCK GENERATOR
Reliability Information
Table 6. θJA vs. Air Flow Table for a 24 Lead TSSOP
θJA vs. Air Flow
Linear Feet per Minute
0
Multi-Layer PCB, JEDEC Standard Test Boards
70°C/W
200
63°C/W
500
60°C/W
Transistor Count
The transistor count for ICS87004I is: 2578
Package Outline and Package Dimensions
Package Outline - G Suffix for 24 Lead TSSOP
Table 7. Package Dimensions
All Dimensions in Millimeters
Symbol Minimum Maximum
N
24
A
1.20
A1
0.05
0.15
A2
0.80
1.05
b
0.19
0.30
c
0.09
0.20
D
7.70
7.90
E
6.40 Basic
E1
4.30
4.50
e
0.65 Basic
L
0.45
0.75
α
0°
8°
aaa
0.10
Reference Document: JEDEC Publication 95, MO-153
ICS87004AGI REVISION D JANUARY 4, 2010
12
©2009 Integrated Device Technology, Inc.