ICS853S01I Datasheet, PDF (11/23 Pages) Integrated Device Technology – One LVPECL output pair

ICS853S01I Data Sheet
2:1 DIFFERENTIAL-TO-LVPECL MULTIPLEXER
LVPECL Clock Input Interface (2.5V)
The PCLK /nPCLK accepts LVPECL, LVDS and other differential
signals. The differential signal must meet the V_PP and V_CMR input
requirements. Figures 3A to 3C show interface examples for the
PCLK/nPCLK input driven by the most common driver types. The
input interfaces suggested here are examples only. If the driver is
from another vendor, use their termination recommendation. Please
consult with the vendor of the driver component to confirm the driver
termination requirements.
2.5V
LVDS
Zo = 50Ω
Zo = 50Ω
2.5V
R1
100Ω
PCLK
nPCLK
LVPECL
Input
2. 5V
Zo = 50Ω
Zo = 50Ω
2.5V LVPECL Driv er
R6
R7
100Ω-180Ω 100Ω-180Ω
2.5V
R1
100Ω
C1
C2
R3
100Ω
PCLK
nPCLK
R2
100Ω
R4
100Ω
Figure 3A. PCLK/nPCLK Input Driven by a 2.5V LVDS
Driver
Figure 3B. PCLK/nPCLK Input Driven by a 3.3V LVPECL
Driver with AC Couple
2.5V
LVDS
Zo = 50Ω
Zo = 50Ω
2.5V
R1
100Ω
PCLK
nPCLK
LVPECL
Input
Figure 3C. PCLK/nPCLK Input Driven by a 2.5V LVPECL
Driver
ICS853S01AGI REVISION A OCTOBER 29, 2012
11
©2012 Integrated Device Technology, Inc.