844003I-04 Datasheet, PDF (10/19 Pages) Integrated Device Technology – FemtoClock Crystal-to-LVDS Frequency Synthesizer

Parameter Measurement Information
3.3V ±5%
V_DD,
V_{DDO_A,}
V_{DDO_B} ^VDDA
3.3V LVDS Output Load AC Test Circuit
844003I-04 Datasheet
Phase Noise Plot
Phase Noise Mask
f₁ ^{Offset Frequency} f₂
RMS Jitter = Area Under the Masked Phase Noise Plot
RMS Phase Jitter
nQx
Qx
nQy
Qy
Output Skew
nQA0,
nQB[0:1]
QA0,
QB[0:1]
20%
80%
t_R
Output Rise/Fall Time
nQB0
QB0
nQB1
QB1
t sk(b)
Bank Skew
80%
t_F
V_OD
20%
nQA0,
nQB[0:1]
QA0,
QB[0:1]
Output Duty Cycle/Pulse Width/Period
©2016 Integrated Device Technology, Inc.
10
Revision C, November 10, 2016