ICS9250-27 Datasheet, PDF (1/15 Pages) Integrated Circuit Systems – Frequency Generator & Integrated Buffers for Celeron & PII/III™

DATASHEET
Frequency
for Celeron
G&ePneIIr/IaItIo_TMr
and
Integrated
Buffers
ICS9250-27
Recommended Application:
810/810E and 815 type chipset.
Output Features:
• 3 CPU (2.5V) (up to 133MHz achievable through I²C)
• 9 SDRAM (3.3V) (up to 133MHz achievable
through I²C)
• 7 PCI (3.3 V) @33.3MHz
• 2 IOAPIC (2.5V) @ 33.3 MHz
• 3 Hublink clocks (3.3 V) @ 66.6 MHz
• 2 (3.3V) @ 48 MHz (Non spread spectrum)
• 1 REF (3.3V) @ 14.318 MHz
Features:
• Supports spread spectrum modulation,
0 to -0.5% down spread.
• I²C support for power management
• Efficient power management scheme through PD#
• Uses external 14.138 MHz crystal
• Alternate frequency selections available through I²C
control.
Pin Configuration
*FS2//REF0
1
VDD
2
X1
3
X2
4
GND
5
GND
6
3V66-0
7
3V66-1
8
3V66-2
9
VDD
10
VDD
11
PCICLK_F
12
PCICLK0
13
GND
14
PCICLK1
15
PCICLK2
16
GND
17
PCICLK3
18
PCICLK4
19
PCICLK5
20
VDD
21
VDD
22
GND
23
GND
24
48MHz_0
25
48MHz_1
26
VDD
27
FS0
28
56
GND
55
IOAPIC0
54
IOAPIC1
53
VDDL
52
CPUCLK0
51
VDDL0
50
CPUCLK1
49
CPUCLK2
48
GNDL
47
GND
46
SDRAM0
45
SDRAM1
44
VDD
43
SDRAM2
42
SDRAM3
41
GND
40
SDRAM4
39
SDRAM5
38
VDD
37
SDRAM6
36
SDRAM7
35
GND
34
SDRAM_F
33
VDD
32
PD#
31
SCLK
30
SDATA
29
FS1
56-Pin 300mil SSOP
* This input has a 50KΩ pull-down to GND.
Block Diagram
X1
XTAL
X2
OSC
PLL1
Spread
Spectrum
/2 /3
FS (2:0)
PD#
SDATA
SCLK
Control
Logic
Config
Reg
PLL2
/2
/2
REF0
VDDL
3 ^{CPU66/100/133 (2:0)}
3V66 (2:0)
3
SDRAM (7:0)
8
SDRAM_F
PCICLK (5:0)
6
PCICLK_F
IOAPIC (1:0)
2
VDDL
2 ^{48MHz (1:0)}
Functionality
FS2 FS1 FS0
Function
X
0
0 Tristate
X
0
1 Test
0
1
0
Active CPU = 66MHz
SDRAM = 100MHz
0
1
1
Active CPU = 100MHz
SDRAM = 100MHz
1
1
0
Active CPU = 133MHz
SDRAM = 133MHz
1
1
1
Active CPU = 133MHz
SDRAM = 100MHz
Power Groups
AVDD = Pin 22 Analog power for PLL
AGND = Pin 23 Analog ground
VDD48 = Pin 27 Analog power for 48MHz PLL
GND = Pin 24 Analog ground for 48MHz PLL
IDT^TM Frequency Generator and Integrated Buffers for Celeron & PII/III^TM
1
0395F—01/25/10