ICS854S01I Datasheet, PDF (1/17 Pages) Integrated Device Technology – 2:1 Differential-to-LVDS Multiplexer

2:1 Differential-to-LVDS Multiplexer
ICS854S01I
DATASHEET
General Description
The ICS854S01I is a high performance 2:1 Differential-to-LVDS
Multiplexer. The ICS854S01I can also perform differential translation
because the differential inputs accept LVPECL, LVDS or CML levels.
The ICS854S01I is packaged in a small 3mm x 3mm 16 VFQFN
package, making it ideal for use on space constrained boards.
Features
• 2:1 LVDS MUX
• One LVDS output pair
• Two differential clock inputs can accept: LVPECL, LVDS, CML
• Maximum input/output frequency: 2.5GHz
• Translates LVCMOS/LVTTL input signals to LVDS levels by using
a resistor bias network on nPCLK0, nPCLK1
• RMS additive phase jitter: 0.06ps (typical)
• Propagation delay: 600ps (maximum)
• Part-to-part skew: 350ps (maximum)
• Full 3.3V supply mode
• -40°C to 85°C ambient operating temperature
• Available in lead-free (RoHS 6) package
Block Diagram
PCLK0 ^Pulldown
nPCLK0 ^{Pullup/Pulldown}
PCLK1 ^Pulldown
nPCLK1 ^{Pullup/Pulldown}
CLK_SEL ^Pulldown
0
Q
nQ
1
Pin Assignment
16 15 14 13
PCLK0 1
12 GND
nPCLK0 2
11 Q
PCLK1 3
10 nQ
nPCLK1 4
9 GND
5 6 78
ICS854S01I
16-Lead VFQFN
3mm x 3mm x 0.925mm package body
K Package
Top View
ICS854S01AKI June 15, 2017
1
©2017 Integrated Device Technology, Inc.