ICS854057 Datasheet, PDF (9/13 Pages) Integrated Circuit Systems – 4:1 OR 2:1 LVDS CLOCK MULTIPLEXER WITH INTERNAL INPUT TERMINATION

Integrated
Circuit
Systems, Inc.
ICS854057
4:1 OR 2:1 LVDS CLOCK MULTIPLEXER
WITH INTERNAL INPUT TERMINATION
LVPECL INPUT WITH BUILT-IN 50Ω TERMINATIONS INTERFACE
The PCLK /nPCLK with built-in 50Ω terminations accepts 50Ω terminations driven by the most common driver types.The
LVDS, LVPECL, LVHSTL, CML, SSTL and other differential input interfaces suggested here are examples only. If the driver
signals. Both VSWING and VOH must meet the V_PP and V_CMR is from another vendor, use their termination recommendation.
input requirements. Figures 3A to 3E show interface Please consult with the vendor of the driver component to
examples for the HiPerClockS PCLK/nPLCK input with built-in confirm the driver termination requirements.
3.3V or 2.5V
2. 5V
LVDS
Zo = 50 Ohm
Zo = 50 Ohm
IN
VT
nIN
R e c e ive r
With
Built-In
50 Ohm
FIGURE 3A. HIPERCLOCKS PCLK/nPCLK INPUT WITH
BUILT-IN 50Ω DRIVEN BY AN LVDS DRIVER
2.5V
Zo = 50 Ohm
Zo = 50 Ohm
2.5V LVPECL
2. 5V
IN
VT
nI N
R1
18
R e ce i ve r
With
Built-In
50 Ohm
FIGURE 3B. HIPERCLOCKS PCLK/nPCLK INPUT WITH
BUILT-IN 50Ω DRIVEN BY AN LVPECL DRIVER
2.5V
2.5V
2.5V
2.5V
Zo = 50 Ohm
Zo = 50 Ohm
CML - Open Collector
IN
VT
nIN
R e ce i ve r
With
Built-In
50 Ohm
Zo = 50 Ohm
Zo = 50 Ohm
CML - Built-in 50 Ohm Pull-up
IN
VT
nIN
R e ce ive r
With
Built-In
50 Ohm
FIGURE 3C. HIPERCLOCKS PCLK/nPCLK INPUT WITH
BUILT-IN 50Ω DRIVEN BY AN OPEN COLLECTOR
CML DRIVER
FIGURE 3D. HIPERCLOCKS PCLK/nPCLK INPUT WITH
BUILT-IN 50Ω DRIVEN BY A CML DRIVER
WITH BUILT-IN 50Ω PULLUP
2.5V
R1
R2
SSTL
25
Zo = 50 Ohm
Zo = 50 Ohm
25
2.5V
IN
VT
nIN
Receiver With Built-In 50Ω
FIGURE 3E. HIPERCLOCKS PCLK/nPCLK INPUT WITH
BUILT-IN 50Ω DRIVEN BY AN SSTL DRIVER
854057AG
www.icst.com/products/hiperclocks.html
9
REV. A JULY 18, 2005