ICS854057 Datasheet, PDF (2/13 Pages) Integrated Circuit Systems – 4:1 OR 2:1 LVDS CLOCK MULTIPLEXER WITH INTERNAL INPUT TERMINATION

Integrated
Circuit
Systems, Inc.
ICS854057
4:1 OR 2:1 LVDS CLOCK MULTIPLEXER
WITH INTERNAL INPUT TERMINATION
TABLE 1. PIN DESCRIPTIONS
Number Name
Type
Description
1, 20
2
3
4
5
V_DD
PCLK0
VT0
nPCLK0
SEL1
Power
Input
Input
Input
Input
Pulldown
Positive supply pins.
Non-inverting
LVPECL
differential
clock
input.
R
T
=
50Ω
termination
to
VT0.
Termination input. For LVDS input, leave floating.
R_T = 50Ω termination to VT0.
Inverting LVPECL differential clock input. R_T = 50Ω termination to VT0
Clock select input. LVCMOS / LVTTL interface levels.
6
SEL0
Input Pulldown Clock select input. LVCMOS / LVTTL interface levels.
7
8
9
10, 11
PCLK1
VT1
nPCLK1
GND
Input
Input
Input
Power
Non-inverting LVPECL differential clock input. R_T = 50Ω termination to VT1.
Termination input. For LVDS input, leave floating.
R
T
=
50Ω
termination
to
VT1.
Inverting LVPECL differential clock input. R_T = 50Ω termination to VT1.
Power supply ground.
12
13
14
15, 16
nPCLK2
VT2
PCLK2
nQ, Q
Input
Input
Input
Output
Inverting LVPECL differential clock input. R_T = 50Ω termination to VT2.
Termination input. For LVDS input, leave floating.
R_T = 50Ω termination to VT2.
Non-inverting LVPECL differential clock input. R_T = 50Ω termination to VT2.
Differential output pairs. LVDS interface levels.
17
nPCLK3
Input
Inverting
LVPECL
differential
clock
input.
R
T
=
50Ω
termination
to
VT3.
18
VT3
Input
Termination input. For LVDS input, leave floating.
R_T = 50Ω termination to VT3.
19
PCLK3
Input
Non-inverting LVPECL differential clock input. R_T = 50Ω termination to VT3.
NOTE: Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
C
IN
R_PULLDOWN
R_T
Parameter
Input Capacitance
Input Pulldown Resistor
Input Termination Resistor
Test Conditions
Minimum
Typical
1.5
50
50
Maximum
Units
pF
kΩ
Ω
TABLE 3. CONTROL INPUT FUNCTION TABLE
Inputs
SEL1
SEL0
0
0
0
1
1
0
1
1
Clock Out
PCLKx/nPCLKx
PCLK0, nPCLK0
PCLK1, nPCLK1
PCLK2, nPCLK2
PCLK3, nPCLK3
854057AG
www.icst.com/products/hiperclocks.html
2
REV. A JULY 18, 2005