ICS8535-21 Datasheet, PDF (9/14 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-2 LVCMOS/LVTTL-TO-3.3V LVPECL FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
ICS8535-21
LOW SKEW, 1-TO-2
LVCMOS/LVTTL-TO-3.3V LVPECL FANOUT BUFFER
SCHEMATIC EXAMPLE
Figure 3 shows a schematic example of the ICS8535-21. The
decoupling capacitors should be physically located near the
power pin. For ICS8535-21, the unused clock outputs can be
left floating.
CLK_EN
CLK_SEL
CLK0
CLK1
VCC = 3.3V
U2
1
2
3
4
5
6
VEE
CLK_EN
CLK_SEL
CLK0
VEE
7
CLK1
VCC
8535-21
14
VCC
Q0
nQ0
nc
Q1
13
12
11
10
9
nQ1
VCC
8
(U1-7)
VCC
(U1-8)
(U1-14)
C1
C2
C3
C4
10uf
.1uF
.1uF
.1uF
Zo = 50
Zo = 50
+
-
R2
R1
50
50
R3
50
Vcco = 3.3V
R4
133
Zo = 50
Zo = 50
R5
82.5
R6
133
+
-
R7
82.5
Optional Termination
FIGURE 3. ICS8535-21 LVPECL BUFFER SCHEMATIC EXAMPLE
8535AG-21
www.icst.com/products/hiperclocks.html
9
REV. A OCTOBER 20, 2004