ICS8535-21 Datasheet, PDF (2/14 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-2 LVCMOS/LVTTL-TO-3.3V LVPECL FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
ICS8535-21
LOW SKEW, 1-TO-2
LVCMOS/LVTTL-TO-3.3V LVPECL FANOUT BUFFER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 5
V_EE
Power
Negative supply pins.
Synchronizing clock enable. When HIGH, clock outputs follow clock input.
2
CLK_EN Input Pullup When LOW, Q outputs are forced low, nQ outputs are forced high.
LVCMOS / LVTTL interface levels.
3
CLK_SEL
Input
Pulldown
Clock select input. When HIGH, selects CLK1 input.
When LOW, selects CLK0 input. LVCMOS / LVTTL interface levels.
4
CLK0
Input Pulldown LVCMOS / LVTTL clock input.
6
CLK1
Input Pulldown LVCMOS / LVTTL clock input.
7, 8, 14
9, 10
V_CC
nQ1, Q1
Power
Output
Positive supply pins.
Differential output pair. LVPECL interface levels.
11
nc
Unused
No connect.
12, 13
nQ0, Q0 Output
Differential output pair. LVPECL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
C_IN
R_PULLUP
R_PULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
KΩ
KΩ
8535AG-21
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2
REV. A OCTOBER 20, 2004