ICS952607 Datasheet, PDF (8/21 Pages) Integrated Circuit Systems – Programmable Timing Control Hub for Next Gen P4 processor

Integrated
Circuit
Systems, Inc.
ICS952607
Advance Information
I²C Table: Frequency Select Register
Byte 0
Pin #
Name
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
FS Source
FS6
FS5
FS4
FS3
FS2
FSA
FSB
Control
Function
Frequency H/W IIC
Select
Freq Select Bit 6
Freq Select Bit 5
Freq Select Bit 4
Freq Select Bit 3
Freq Select Bit 2
Freq Select Bit 1
Freq Select Bit 0
Type
RW
RW
RW
RW
RW
RW
RW
RW
I²C Table: Spreading and Device Behavior Control Register
Byte 1
Bit 7
Bit 6
Pin #
-
-
Name
SS1
SS0
Control
Function
Spread Select 1
Spread Select 0
Bit 5
-
SS_EN
Spread Enable Control
Bit 4
Bit 3
-
37,36
WDS_EN
SRC/SRC#
WD Soft Reset Enable
Output Control
Bit 2
-
Reserved
Reserved
Bit 1
Bit 0
43,42
40,39
CPUCLKT/C_1
CPUCLKT/C_0
Output Control
Output Control
Type
RW
RW
RW
RW
RW
RW
RW
RW
I²C Table: Output Control Register
Byte 2
Pin #
Name
Bit 7
-
SRC Stop Mode
Bit 6
-
Reserved
Bit 5
-
CPUT Stop Mode
Bit 4
-
Bit 3
27
Bit 2
-
Bit 1
-
Bit 0
-
Reserved
3V66_2
Reserved
Reserved
Reserved
Control
Function
0: SRCT Driven during
PD#; 1: Tri-stated
Reserved
0: CPUT Driven during
PD#; 1: Tri-stated
Reserved
Output Control
Reserved
Reserved
Reserved
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
Latch Inputs
IIC
See Table 1: QuadRom Frequency
Selection Table
0
00 = 0.35%
01 = 0.50%
ON
ON
Disable
-
Disable
Disable
1
10 = 0.75%
11 = No Spread
OFF
OFF
Enable
-
Enable
Enable
0
Driven
-
Driven
-
Disable
-
-
-
1
Hi-Z
-
Hi-Z
-
Enable
-
-
-
PWD
0
0
0
0
0
0
0
0
PWD
0
0
1
0
1
1
1
1
PWD
0
0
0
0
1
1
1
1
0734—07/16/04
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