ICS950218 Datasheet, PDF (8/19 Pages) Integrated Circuit Systems – Programmable Timing Control Hub TM for P4 TM

Integrated
Circuit
Systems, Inc.
ICS950218
Byte 5: Programming Edge Rate
(1 = enable, 0 = disable)
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin#
X
X
X
X
X
X
X
X
PWD
X
X
1
1
0
1
1
0
Description
Sel 48_24# (Read back)
Sel 66_48# (Read back)
(Reserved)
(Reserved)
0 = Sel 66_48# by hardware; 1 = by I²C
Sel 66_48#, 0 = 48MHz, 1 = 66MHz
Async. frequency control bit 1
Async. frequency control bit 0
Asynchronous Frequency Control Table
Byte 5
Bit 1
0
0
1
1
Byte 5
Bit 0
0
1
0
1
3V66 [3:0]
66.01 MHz
75.44 MHz
66.66 MHz
88.01 MHz
PCI [9:0]
33.005 MHZ
37.72 MHz
33.33 MHz
44.005 MHz
Note
From Fix PLL (No spread)
From Fix PLL (No spread)
From main PLL (Default)
From Fix PLL (No spread)
Byte 6: Vendor ID Register
(1 = enable, 0 = disable)
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
Revision ID Bit3
Revision ID Bit2
Revision ID Bit1
Revision ID Bit0
Vendor ID Bit3
Vendor ID Bit2
Vendor ID Bit1
Vendor ID Bit0
PWD
X
X
X
X
0
0
0
1
Description
Revision ID values will be based on individual device's revision
(Reserved)
(Reserved)
(Reserved)
(Reserved)
Byte 7: Revision ID and Device ID Register
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
Device ID7
Device ID6
Device ID5
Device ID4
Device ID3
Device ID2
Device ID1
Device ID0
PWD
0
0
1
0
1
0
0
0
Description
Device ID values will be based on individual device
"28H" in this case.
0466B—03/17/04
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