ICS950218 Datasheet, PDF (1/19 Pages) Integrated Circuit Systems – Programmable Timing Control Hub TM for P4 TM

Integrated
Circuit
Systems, Inc.
ICS950218
Programmable Timing Control Hub™ for P4™
Recommended Application:
Brookdale and Brookdale-G chipset with P4 processor.
Output Features:
• 3 - Pairs of differential CPU clocks (differential current
mode)
• 3 - 3V66 @ 3.3V
• 10 - PCI @ 3.3V
• 1 - 48MHz @ 3.3V fixed
• 2 - REF @ 3.3V, 14.318MHz
• 1 - 48_66MHz selectable @ 3.3V fixed
• 1 - 24_48MHz selectable @ 3.3V
Features/Benefits:
• Programmable output frequency.
• Programmable output divider ratios.
• Programmable output rise/fall time.
• Programmable output skew.
• Programmable spread percentage for EMI control.
• Watchdog timer technology to reset system
if system malfunctions.
• Programmable watch dog safe frequency.
• Support I²C Index read/write and block read/write
operations.
• Uses external 14.318MHz crystal.
Key Specifications:
• CPU Output Jitter <150ps
• 3V66 Output Jitter <250ps
• CPU Output Skew <100ps
Frequency Table
Bit2 Bit7
Bit6
Bit5
Bit4
CPUCLK
FS4 FS3
FS2
FS1
FS0
MHz
0
0
0
0
0
102.00
0
0
0
0
1
105.00
0
0
0
1
0
108.00
0
0
0
1
1
111.00
0
0
1
0
0
114.00
0
0
1
0
1
117.00
0
0
1
1
0
120.00
0
0
1
1
1
123.00
0
1
0
0
0
126.00
0
1
0
0
1
130.00
0
1
0
1
0
136.00
0
1
0
1
1
140.00
0
1
1
0
0
144.00
0
1
1
0
1
148.00
0
1
1
1
0
152.00
0
1
1
1
1
156.00
1
0
0
0
0
160.00
1
0
0
0
1
164.00
1
0
0
1
0
166.60
1
0
0
1
1
170.00
1
0
1
0
0
175.00
1
0
1
0
1
180.00
1
0
1
1
0
185.00
1
0
1
1
1
190.00
1
1
0
0
0
66.80
1
1
0
0
1
100.20
1
1
0
1
0
133.60
1
1
0
1
1
200.40
1
1
1
0
0
66.60
1
1
1
0
1
100.00
1
1
1
1
0
200.00
1
1
1
1
1
133.33
3V66
MHz
68.00
70.00
72.00
74.00
76.00
78.00
80.00
82.00
72.00
74.30
68.00
70.00
72.00
74.00
76.00
78.00
80.00
82.00
66.60
68.00
70.00
72.00
74.00
76.00
66.80
66.80
66.80
66.80
66.60
66.60
66.60
66.60
PCICLK
MHz
34.00
35.00
36.00
37.00
38.00
39.00
40.00
41.00
36.00
37.10
34.00
35.00
36.00
37.00
38.00
39.00
40.00
41.00
33.30
34.00
35.00
36.00
37.00
38.00
33.40
33.40
33.40
33.40
33.30
33.30
33.30
33.30
0466B—03/17/04
Pin Configuration
*MULTISEL1/REF1 1
VDDREF 2
X1 3
X2 4
GND 5
*FS2/PCICLK0 6
*FS3/PCICLK1 7
**SEL48_24#/PCICLK2 8
VDDPCI 9
*FS4/PCICLK3 10
PCICLK4 11
PCICLK5 12
GND 13
PCICLK6 14
PCICLK7 15
PCICLK8 16
PCICLK9 17
VDDPCI 18
Vtt_PWRGD# 19
RESET# 20
GND 21
1_{*FS0/48MHz 22}
*FS1/24_48MHz 23
AVDD48 24
48 REF0/MULTSEL0*
47 GND
46 VDDCPU
45 CPUCLKT2
44 CPUCLKC2
43 GND
42 PD#
41 CPUCLKT0
40 CPUCLKC0
39 VDDCPU
38 CPUCLKT1
37 CPUCLKC1
36 GND
35 I REF
34 AVDD
33 GND
32 VDD3V66
31 3V66_0
30 3V66_1
29 GND
28 3V66_2
27 3V66_48MHz/SEL66_48#*
26 SCLK
25 SDATA
48-Pin 300-mil SSOP
1 This output has 2X drive
* Internal Pull-up resistor of 120K to VDD
** Internal Pull-down resistor of 120K to GND