ICS9248-128 Datasheet, PDF (8/16 Pages) Integrated Circuit Systems – Frequency Generator & Integrated Buffers

ICS9248-128
Electrical Characteristics - PCICLK
T_A = 0 - 70º C; V_DD = 3.3 V +/- 5%, V_DDL = 2.5 V +/- 5 %; C_L = 30 pF (unless otherwise stated).
PARAM ETER
SYMBOL
CONDITIONS
MIN TYP
Output High Voltage
V_OH1
I_OH = -11 mA
Output Low Voltage
V_OL1
I_OL = 9.4 mA
Output High Current
I_OH1
V_OH = 2.0 V
Output Low Current
I_OL1
V_OL = 0.8 V
Rise Time
t_r11
V_OL = 0.4 V, V_OH = 2.4 V
Fall Time
t_f11
V_OH = 2.4V, V_OL = 0.4 V
Duty Cycle
d
t
1
1
V_T = 1.5 V
Skew
Jitter, Cycle-to-cycle
t_s
1
k1
t_j
cy c-cy
1
c
V_T = 1.5 V
V_T = 1.5 V
1_{Guaranteed by design, not 100% tested in production.}
2.4 2.6
0.3
-18
16 24
1.8
1.7
45
49
260
150
MAX
0.4
22
2
2
55
500
500
UNITS
V
V
mA
mA
ns
ns
%
ps
ps
Electrical Characteristics - SDRAM
T_A = 0 - 70º C; V_DD = 3.3 V +/- 5%, V_DDL = 2.5 V +/- 5 %; C_L = 30 pF (unless otherwise stated).
PARAM ETER
SYMBOL
CONDITIONS
MIN TYP
Output High Voltage
V_OH1
I_OH = -11 mA
2.4 2.6
Output Low Voltage
V_OL1
I_OL = 9.4 mA
0.3
Output High Current
I_OH1
V_OH = 2.0 V
-18
Output Low Current
I_OL1
V_OL = 0.8 V
16 24
Rise Time
t_r11
V_OL = 0.4 V, V_OH = 2.4 V
1.6
Fall Time
t_f11
V_OH = 2.4V, V_OL = 0.4 V
1.6
d
t
1
1
V_T = 1.5 V; divide by 2 selects < 124 MHz 47
50
Duty Cycle
d
t
1
2
V_T = 1.5 V; divide by 3 selects
45 50
d
t
1
3
V_T = 1.5 V; selects >= 124 MHz
43
50
t_sk
1
1
V_T = 1.5 V; SDRAM 8, 9, 11 & 12
110
Skew
t_sk
1
2
V_T = 1.5 V; all except SDRAM 8, 9, 11 & 12
100
t_sk
1
3
V_T = 1.5 V; all SDRAMs
220
Jitter, Cycle-to-cycle
t_j
cy c-cy
1
c
V_T = 1.5 V
200
1_{Guaranteed by design, not 100% tested in production.}
MAX
0.4
22
2
2
57
55
53
250
250
350
500
UNITS
V
V
mA
mA
ns
ns
%
%
%
ps
ps
ps
ps
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