ICS9248-128 Datasheet, PDF (3/16 Pages) Integrated Circuit Systems – Frequency Generator & Integrated Buffers

ICS9248-128
General Description
The ICS9248-128 is the single chip clock solution for Desktop/Notebook designs using the SIS style chipset. It provides all
necessary clock signals for such a system.
Spread spectrum may be enabled through I²C programming. Spread spectrum typically reduces system EMI by 8dB to 10dB.
This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9248-128 employs a
proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations.
Serial programming I²C interface allows changing functions, stop clock programming and frequency selection. The SD_SEL
latched input allows the SDRAM frequency to follow the CPUCLK frequency(SD_SEL=1) or other clock frequencies
(SD_SEL=0)
Mode Pin - Power Management Input Control
MODE, Pin 2
(Latched Input)
0
1
Pin 17
CPU_STOP#
(INPUT)
SDRAM 11
(OUTPUT)
Pin 18
PCI_STOP#
(INPUT)
SDRAM 10
(OUTPUT)
Pin 20
SDRAM_STOP#
(INPUT)
SDRAM9
(OUTPUT)
Pin 21
PD#
(INPUT)
SDRAM8
(OUTPUT)
Power Management Functionality
PD# CPU_STOP# PCI_STOP# SDRAM_STOP ^PCICLK
(0:4)
0
X
X
X
Stopped
Low
1
1
1
1
Running
1
1
1
0
Running
1
1
0
1
1
0
1
Stopped
Low
0
Stopped
Low
1
0
1
1
Running
1
0
1
1
0
0
1
0
0
0
Running
1
Stopped
Low
Stopped
0
Low
SDRAM
(0:12)
Stopped
Low
Running
Stopped
Low
PCICLK_F
Stopped
Low
Running
Running
CPUCLK
Stopped
Low
Running
Running
Running Running Running
Stopped
Low
Running
Stopped
Low
Running
Stopped
Low
Running
Running
Running
Running
Running
Running
Stopped
Low
Stopped
Low
Stopped
Low
Stopped
Low
Crystal
OSC
Stopped
Low
Running
Running
Running
Running
Running
Running
Running
Running
VCO
Stopped
Low
Running
Running
Running
Running
Running
Running
Running
Running
CPU 3.3#_2.5V Buffer selector for CPUCLK drivers.
CPU3.3#_2.5
Input level
(Latched Data)
1
0
Buffer Selected
for operation at:
2.5V VDD
3.3V VDD
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