ICS9248-128 Datasheet, PDF (15/16 Pages) Integrated Circuit Systems – Frequency Generator & Integrated Buffers

ICS9248-128
General Layout Precautions:
1) Use a ground plane on the top layer
of the PCB in all areas not used by ^VDD
traces.
2) Make all power traces and ground
traces as wide as the via pad for lower
inductance.
Notes:
1) All clock outputs should have a
series terminating resistor, and a 20pF
capacitor to ground between the
resistor and clock pin. Not shown in
all places to improve readibility of
diagram.
2) Optional crystal load capacitors are
recommended. They should be
included in the layout but not
inserted unless needed.
Connections to VDD:
Ferrite
Bead
C2
22µF/20V
Tantalum
1
2
3
C1
4
C1
5
6
7
8
3.3V Power Route
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
C2
22µF/20V
Tantalum
Ferrite
Bead
VDD
48
C3
47
46
45
2.5V Power Route
44
C4
1
43
Clock Load
42
C3
41
40
39
Ground
38
37
36
35
34
33
3.3V Power Route
32
31
30
29
28
27
26
25
= Routed Power
= Ground Connection Key (component side copper)
= Ground Plane Connection
= Power Route Connection
= Solder Pads
= Clock Load
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