ICS87931I Datasheet, PDF(8/14 Page) Integrated Circuit Systems – LOW SKEW, 1-TO-6 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER

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ICS87931I Datasheet, PDF (8/14 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-6 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER

◁

Integrated

Circuit

Systems, Inc.

ICS87931I

LOW SKEW, 1-TO-6

LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER

APPLICATION INFORMATION

WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LEVELS

Figure 2 shows how the differential input can be wired to accept of R1 and R2 might need to be adjusted to position the V_REF in

single ended levels. The reference voltage V_REF = VDD/2 is the center of the input voltage swing. For example, if the input

generated by the bias resistors R1, R2 and C1. This bias circuit clock swing is only 2.5V and VDD = 3.3V, V_REF should be 1.25V

should be located as close as possible to the input pin. The ratio and R2/R1 = 0.609.

VDD

Single Ended Clock Input

V_REF

0.1u

CLK

nCLK

FIGURE 2. SINGLE ENDED SIGNAL DRIVING DIFFERENTIAL INPUT

87931BYI

www.icst.com/products/hiperclocks.html

REV. A JUNE 23, 2003

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