ICS87004 Datasheet, PDF (8/14 Pages) Integrated Circuit Systems – 1:4, DIFFERENTIAL-TO-LVCMOS/LVTTL ZERO DELAY CLOCK GENERATOR

Integrated
Circuit
Systems, Inc.
ICS87004
1:4, DIFFERENTIAL-TO-LVCMOS/LVTTL
ZERO DELAY CLOCK GENERATOR
nCLK0,
nCLK1
CLK0,
CLK1
FB_IN
➤ t (Ø)
VOH
VOL
VOH
VDDO
2
VOL
nCLK0,
nCLK1
CLK0,
CLK1
Q0:Q3
V_DDO
2
t
PD
t(Ø) mean = Static Phase Offset
(where t(Ø) is any random sample, and t(Ø) mean is the average
of the sampled cycles measured on controlled edges)
STATIC PHASE OFFSET
PROPAGATION DELAY
Q0:Q3
V_DDO
2
t _PW
V_DDO
2
t _PERIOD
odc = ^{t PW}
t _PERIOD
V_DDO
2
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
87004AG
www.icst.com/products/hiperclocks.html
8
REV. A JUNE 16, 2004