ICSLV810 Datasheet, PDF (7/12 Pages) Integrated Circuit Systems – Buffer/Clock Driver

ICSLV810
Buffer/Clock Driver
AC Electrical Characteristics—Bank B
VDDB = 2.5 V, Ambient Temperature -40° C to +85° C, unless otherwise noted
Parameter
Symbol
Conditions
Min.
Output Skew: skew between
outputs of same package
tSK(0)
CL = 3 pF, RL = 500Ω -200
Figure 3
Pulse Skew: skew between
opposite transitions of same
output (tPLH-tPHL)
tSK(P)
CL = 3 pF, RL = 500Ω -200
Figure 4
Propagation Delay
tpLH / tpHL
CL = 3 pF, RL = 500Ω,
VDDB = 1.5 V
Figure 2
CL = 3 pF, RL = 500Ω, 1.5
VDDB = 2.5 V
Figure 2
Part to Part Skew
CL = 3 pF, RL = 500Ω -1
VDDB = 1.5 V
Figure 5
CL = 3 pF, RL = 500Ω
VDDB = 2.5 V
Figure 5
-650
Output Rise Time
20% to 80%
tr(o)
CL = 3 pF, RL = 500Ω
VDDB = 1.5 V
CL = 3 pF, RL = 500Ω
VDDB = 2.5 V
Output Fall Time
80% to 20%
tf(o)
CL = 3 pF, RL = 500Ω
VDDB = 1.5 V
CL = 3 pF, RL = 500Ω
VDDB = 2.5 V
Additive Jitter
t_J
All Outputs,
VDDB = 1.5 V
All Outputs,
VDDB = 2.5 V
Duty Cycle
Measured at VDD/2
DC
CL = 3 pF,
45
RL = 500Ω
Duty Cycle, VDDB = 1.8V
DC
40
Output Frequency Range
1
Typ. Max. Units
200 ps
200 ps
5.5
ns
2.6 3.5 ns
1
ns
650 ps
1.0
ns
0.8
ns
1.0
ns
0.8
ns
34 ps
50 ps
55
%
50 60
%
133 MHz
MDS LV810 F
7
Revision 101305
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel [phone] ● www.icst.com