ICSLV810 Datasheet, PDF (10/12 Pages) Integrated Circuit Systems – Buffer/Clock Driver

ICSLV810
Buffer/Clock Driver
Package Outline and Package Dimensions (20-pin QSOP, 150 Mil. Body)
Package dimensions are kept current with JEDEC Publication No. 95
20
INDEX
AREA
12
D
A
2
e
b
Millimeters
Inches*
E1 E
A
Symbol
A
A1
A2
b
C
D
E
E1
e
L
α
Min
Max
1.35 1.75
0.10 0.25
--
1.50
0.20 0.30
0.18 0.25
8.55 8.75
5.80 6.20
3.80 4.00
0.635 Basic
0.40 1.27
0°
8°
Min
Max
.053 .069
.0040 .010
--
.059
0.008 0.012
.007 .010
.337 .344
.228 .244
.150 .157
0.025 Basic
.016 .050
0°
8°
*For reference only. Controlling dimensions in mm.
A
1
-C-
SEATING
PLANE
C ^{.10 (.004)}
c
L
MDS LV810 F
10
Revision 101305
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel [phone] ● www.icst.com