ICS950403 Datasheet, PDF (6/18 Pages) Integrated Circuit Systems – AMD - K8™ System Clock Chip

ICS950403
Advance Information
I²C Table: Functionality and Frequency Control Register
Byte 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
-
-
-
-
-
-
-
-
Name
GSR_EN
-
-
-
-
-
-
FS Source
Control
Function
Gear Shift Reset
Enable
SPREAD Enable
FS4
FS3
FS2
FS1
FS0
Frequency H/W IIC
Select
I²C Table: Output Control Register
Byte 1
Pin #
Name
Bit 7
12
Bit 6
24
Bit 5
22
Bit 4
21
Bit 3
18
Bit 2
17
Bit 1
14
Bit 0
13
PCICLK10
PCICLK6
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0
Control
Function
Output Control
Output Control
Output Control
Output Control
Output Control
Output Control
Output Control
Output Control
I²C Table: Output Control Register
Byte 2
Pin #
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
37/36
41/40
45
48
1
28
31
-
CPUT/C_1
CPUT/C_0
REF2
REF1
REF0
24_48MHz
48MHz
WDSEN
Control
Function
Output Control
Output Control
Output Control
Output Control
Output Control
Output Control
Output Control
Watchdog Soft Alarm
Enable
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
Disable
Disable
1
Enable
Enable
See Table1: Frequency
Selection Table
Latch Inputs
IIC
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Disable
1
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Disable
1
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
PWD
0
0
0
0
0
0
0
0
PWD
1
1
1
1
1
1
1
1
PWD
1
1
1
1
1
1
1
0
I²C Table: Output Control Register
Byte 3
Pin #
Name
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
0732—01/27/03
Control
Function
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Type
0
RW
-
RW
-
RW
-
RW
-
RW
-
RW
-
RW
-
RW
-
6
1
PWD
-
1
-
1
-
1
-
1
-
1
-
1
-
1
-
1