ICS950403 Datasheet, PDF (11/18 Pages) Integrated Circuit Systems – AMD - K8™ System Clock Chip

ICS950403
Advance Information
Table 3: 7-Steps Skew Programming Table
7 Step
11
10
01
00
LSB
11
900 ps
750 ps
600 ps
450 ps
10
N/A
N/A
N/A
300 ps
01
N/A
N/A
N/A
150 ps
00
N/A
N/A
N/A
0.0 ps
MSB
I²C Table: Group Skew Control Register
Byte 19
Pin #
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
PCISkw3
PCISkw2
PCISkw1
PCISkw0
PCI/HTTSkw3
PCI/HTTSkw2
PCI/HTTSkw1
PCI/HTTSkw0
Control
Function
CPU-PCICLK Skew
Control
CPU-PCICLK
/HTTCLK Skew Control
Type
RW
RW
RW
RW
RW
RW
RW
RW
I²C Table: Group Skew Control Register
Byte 20
Pin #
Name
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Control
Function
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Type
RW
RW
RW
RW
RW
RW
RW
RW
I²C Table: Slew Rate Control Register
Byte 21
Pin #
Name
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
ASEL
Bit 0
-
AEN
Control
Function
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Async Frequency
Select
AGP/PCI/ Freq Source
Select
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
See Table 3: 7-Steps Skew
Programming Table
See Table 3: 7-Steps Skew
Programming Table
PWD
0
0
0
0
0
0
0
0
0
1
PWD
-
-
1
-
-
1
-
-
1
-
-
1
-
-
1
-
-
1
-
-
1
-
-
1
0
-
-
-
-
-
-
66.0MHz
Fix PLL
1
-
-
-
-
-
-
75.4MHz
CPU PLL
PWD
0
0
0
0
0
0
0
1
0732—01/27/03
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