ICS93V855 Datasheet, PDF (6/9 Pages) Integrated Circuit Systems – DDR Phase Lock Loop Clock Driver

ICS93V855
Parameter Measurement Information
V_DD
V(CLKC)
R = 60Ω
VDD/2
ICS93V855
R = 60Ω VDD/2
ICS93V855
V(CLKC)
GND
Figure 1. IBIS Model Output Load
Z = 60Ω
C = 16 pF _-VDD/2
R = 10Ω Z = 50Ω
Z = 60Ω
R = 10Ω Z = 50Ω
SCOPE
R = 50Ω
V(TT)
C = 16 pF
-VDD/2
-VDD/2
NOTE: V(TT) _{= GND}
Figure 2. Output Load Test Circuit
R = 50Ω
V(TT)
Y_X, FB_OUTC
Y_X, FB_OUTT
0497B—06/01/04
tc(n)
tc(n+1)
tjit(cc) = tc(n) ± tc(n+1)
Figure 3. Cycle-to-Cycle Jitter
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