ICS87949-01 Datasheet, PDF (6/13 Pages) Integrated Circuit Systems – LOW SKEW ÷1, ÷2 CLOCK GENERATOR

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS87949-01
LOW SKEW ÷1, ÷2
CLOCK GENERATOR
TABLE 4D. POWER SUPPLY DC CHARACTERISTICS, V_DD = 3.3V±5%, V_DDX = 2.5V±5%, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions Minimum Typical
V_DD
Positive Supply Voltage
*V
DDx
Output Supply Voltage
I_DD
Core Supply Current
**I_DDx
Output Supply Current
*V_DDx denotes V_DDA, V_DDB, V_DDC, V_DDD.
**I_DDx denotes I_DDA, I_DDB, I_DDC, I_DDD.
3.135
3.3
2.375
2.5
50
13
Maximum
3.465
2.625
Units
V
V
mA
mA
TABLE 4E. LVCMOS DC CHARACTERISTICS, V_DD = 3.3V±5%, V_DDX = 2.5V±5%, TA = 0°C TO 70°C
Symbol Parameter
V
IH
Input
High Voltage
DIV_SELA, DIV_SELB,
DIV_SELC, DIV_SELD,
CLK_SEL, PCLK_SEL,
MR/nOE
Test Conditions
Minimum Typical Maximum Units
2
V_DD + 0.3
V
CLK0, CLK1
DIV_SELA, DIV_SELB,
DIV_SELC, DIV_SELD,
V_IL
Input
Low Voltage
CLK_SEL, PCLK_SEL,
MR/nOE
2
V_DD + 0.3
V
-0.3
0.8
V
CLK0, CLK1
-0.3
1.3
V
DIV_SELA, DIV_SELB,
I_IH
Input
High Current
DIV_SELC, DIV_SELD,
CLK_SEL, PCLK_SEL,
MR/nOE
V_DD = V_IN = 3.465V
150
µA
CLK0, CLK1
V_DD = V_IN = 3.465V
DIV_SELA, DIV_SELB,
I_IL
Input
DIV_SELC, DIV_SELD,
CLK_SEL, PCLK_SEL,
V_DD = 3.465V, V_IN = 0V
-5
Low Current _MR/nOE
5
µA
µA
CLK0, CLK1
V_DD = 3.465V, V_IN = 0V
-150
µA
V_OH
Output High Voltage; NOTE 1
1.8
V
V_OL
Output Low Voltage; NOTE 1
0.5
V
I
Output Tristate Current Low
OZL
TBD
V
I_OZH
Output Tristate Current High
TBD
V
NOTE 1: Outputs terminated with 50Ω to V_DDx/2. See page 8, Figure 1B, 3.3V/2.5V Output Load Test Circuit.
87949AY-01
www.icst.com/products/hiperclocks.html
6
REV. A JANUARY 2, 2002