ICS9250-32 Datasheet, PDF (5/11 Pages) Integrated Circuit Systems – Frequency Generator & Integrated Buffers for PII/III™

ICS9250-32
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to V_DD +0.5 V
Ambient Operating Temperature . . . . . . . . . . . . . 0°C to +70°C
Case Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 115°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
T_A = 0 - 70C; Supply Voltage V_DD = 3.3 V +/-5%, V_DDL = 2.5 V +/-5% (unless otherwise stated)
PARAMETER SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
Operating Supply
Current
Input Frequency
Input Capacitance
Transition time¹
Settling time¹
Clk Stabilization¹
Skew¹
V_IH
V_IL
I_IH
I_IL1
I_IL2
I_DD3.3OP
I_DD2.5OP
F_i
C_IN
C_INX
V_IN = V_DD
V_IN = 0 V; Inputs with no pull-up resistors
V_IN = 0 V; Inputs with pull-up resistors
C_L = Max loads;Select @ 66 MHz
C_L = Max loads;Select @ 66 MHz
V_DD = 3.3 V
Logic Inputs
X1 & X2 oins
T_trans To 1st crossing of target frequency
T_s From 1st crossing to 1% target frequency
T_STAB From V_DD = 3.3 V to 1% target frequency
T_CPU-IOAPIC CPU & IOAPIC @ 1.25 V
T_CPU-PCI CPU @ 1.25 V, PCI @ 1.5 V
2
V_SS-0.3
-5
-5
-200
V_DD+0.3
0.8
5
251 280
27 100
14.312
5
27
45
3
3
3
1.5 2.3
3.5
1.5 2.1
3.5
V
V
µA
µA
mA
mA
MHz
pF
pF
ms
ms
ms
ns
ns
1_{Guaranteed by design, not 100% tested in production.}
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