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ICS950602 Datasheet, PDF (4/16 Pages) Integrated Circuit Systems – Programmable Timing Control Hub for PII/III
Integrated
Circuit
Systems, Inc.
Byte 0: Functionality and frequency select register (Default=0)
Bit
Description
Bit2 Bit1 Bit6 Bit5 Bit4 CPUCLK PCICLK
FS4 FS3 FS2 FS1 FS0 MHz
MHz
Spread %
0 0 0 0 0 200.00 33.30 +/-0.25% center spread
0 0 0 0 1 190.00 38.00 +/-0.25% center spread
0 0 0 1 0 180.00 36.00 +/-0.25% center spread
0 0 0 1 1 170.00 34.00 +/-0.25% center spread
0 0 1 0 0 166.00 33.20 +/-0.25% center spread
0 0 1 0 1 160.00 32.00 +/-0.25% center spread
0 0 1 1 0 150.00 37.50 +/-0.25% center spread
0 0 1 1 1 145.00 36.30 +/-0.25% center spread
0 1 0 0 0 140.00 35.00 +/-0.25% center spread
0 1 0 0 1 136.00 34.00 +/-0.25% center spread
0 1 0 1 0 130.00 32.50 +/-0.25% center spread
0 1 0 1 1 124.00 31.00 +/-0.25% center spread
0 1 1 0 0 67.20 33.60 +/-0.25% center spread
0 1 1 0 1 100.90 33.63 +/-0.25% center spread
Bit
0 1 1 1 0 118.00 39.30 +/-0.25% center spread
(2:1,6:4) 0 1 1 1 1 134.40 33.60 +/-0.25% center spread
1 0 0 0 0 67.00 33.50 +/-0.25% center spread
1 0 0 0 1 100.50 33.50 +/-0.25% center spread
1 0 0 1 0 115.00 38.30 +/-0.25% center spread
1 0 0 1 1 133.90 33.47 +/-0.25% center spread
1 0 1 0 0 66.80 33.40 +/-0.25% center spread
1 0 1 0 1 100.20 33.40 +/-0.25% center spread
1 0 1 1 0 110.00 36.70 +/-0.25% center spread
1 0 1 1 1 133.60 33.40 +/-0.25% center spread
1 1 0 0 0 105.00 35.00 +/-0.25% center spread
1 1 0 0 1 90.00 30.00 +/-0.25% center spread
1 1 0 1 0 85.00 28.30 +/-0.25% center spread
1 1 0 1 1 78.00 39.00 +/-0.25% center spread
1 1 1 0 0 66.60 33.30 +/-0.25% center spread
1 1 1 0 1 100.00 33.30 0 to -0.5% down spread
1 1 1 1 0 75.00 37.50 +/-0.25% center spread
1 1 1 1 1 133.30 33.30 0 to -0.5% down spread
Bit 3
Bit 0
0 - Frequency is selected by hardware select, latched inputs
1 - Frequency is selected by Bit 2,7:4
0 - Normal
1 - Spread spectrum enable
Bit 7
0 - Watch dog safe frequency will be selected by latch inputs
1 - Watch dog safe frequency will be programmed by Byte 10 bit (4:0)
PWD
Note 1
0
0
0
Notes:
1. Default at power-up will be for latched logic inputs to define frequency, as displayed by Bit 3.
ICS950602
0469B—12/18/02
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