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| ICS950602 Datasheet, PDF (14/16 Pages) Integrated Circuit Systems – Programmable Timing Control Hub for PII/III | |||
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Integrated
Circuit
Systems, Inc.
ICS950602
Power Down Waveform
0ns
25ns
50ns
1
2
VCO Internal
CPU 100MHz
3.3V 66MHz
PCI 33MHz
APIC 16.7MHz
PD#
SDRAM 100MHz
REF 14.318MHZ
48MHZ
Note
1. After PD# is sampled active (Low) for 2 consective rising edges of CPUCLKs, all
the output clocks are driven Low on their next High to Low tranistiion.
2. Power-up latency <3ms.
3. Waveform shown for 100MHz
0469Bâ12/18/02
14
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